Spartan® Family FPGAs

[rohscomplaint]

At the beginning, I setup a project based on xc700a, and finish experiment on EVM board.

Then I change the target device to xc200a, error occur when ISE doing the map, it seems that failure on DCM. I deleted the DCM .xaw and all files generated, and generated a new DCM instead, also using the IP core generator. But the DCM newly generated (its name is different with original one) didn't include .vhd file, and only blank appeared in the windows when click "View HDL Source" or "View HDL Instantiation Template". I had tried many times, nothing worked.

Please help me to explain. Thanks a lot.

[bassman59]

Instantiate the DCM directly as described in the Synthesis manual and the Spartan 3 Family User guide. Don't bother with Core Generators.

[barriet]

The Library Guide, ProjNav language templates, and XAPP462 are all good resources to directly instantiate it.

http://www.xilinx.com/support/documentation/application_notes/xapp462.pdf (Using Digital Clock Managers (DCMs) in Spartan-3 FPGAs)

bt