05-16-2009 04:09 AM
Its a better practice to use IBUFG manually. Refer the Figure 2 in the attached Doc.
05-16-2009 10:48 PM
If you instantiate a DCM using Core Generator, then you dont need to use a BUFG or IBUFG as they will be instantiated by the ISE by itself. On other hand if you instantiate the DCM within the main code, then you need to insert the buffers on the input and output.
05-17-2009 08:32 AM
For slower clock speeds, it is also reasonable to use the clock without a DCM. This may in fact
be necessary for clocks that are too slow or have too much jitter or can be gated off, etc.
If you use HDL (VHDL, Verilog) code entry, you can just use the clock input net as the clock
and XST will automatically insert the BUFG for you. This can run into problems if you need
to use the input net as well as the buffered clock. For example if you want to use the clock
directly but also route it to a DCM to create other frequencies. In that case you need to
instantiate the buffers.