12-10-2010 09:49 AM
I have written a small code of mux which gives output when enable is high
The RTL schematic shows BUFT, what does this mean and why invertor is used with Enable
Why RTL is not showing the AND function of Enable with result.
If enable will be high then result will remain same, if enable is low, result will be other...
What i think it is something related to out=4'bz
kindly explain me
Solved! Go to Solution.
12-10-2010 10:05 AM - edited 12-10-2010 10:37 AM
BUFT is a tri-state
Output is Z when T input=1.
You have defined in your schematic that output=Z when ENABLE=0, and that is why the inverter is inferred.
12-10-2010 10:29 AM - edited 12-10-2010 11:34 AM
Actually, BUFTs are internal tristate buffers. OBUFTs are output tristates.
BUFTs were used on Virtex/Virtex-E/Spartan-II/Spartan-IIE but were not carried forward to Virtex-II, Spartan-3, or future families - for a variety of reasons including effects of process scaling.
They used to be used for things like large internal muxes - at least that's where I used them.
They are further described in the respective library guide and/or user guide.
http://www.xilinx.com/support/answers/20048.htm (XST - Warning "Xst:2183: the following tristate(s) are NOT replaced by logic" - Reasons XST cannot replace TBUFs with logic)
== edit.fixed typo
12-10-2010 10:37 AM
Thanks, Tim. I updated my post.
12-10-2010 11:08 AM - edited 12-10-2010 11:10 AM
Thanks i understood.
You people are really like a book for me
I am really impressed by Xilinx and their customer support. Their employes are also forthcoming and explaining the queries in detail in this forum