Spartan® Family FPGAs

[srinathvarda]

verilog doubt

i'm setting a flag F1 after a work W1 is done in an always block B1 of
module M1.
Now i'm referring that flag F1 in another always block B2 to start
work W2 when set. This block B2 is in the same module M1.

now when I do this I get an error saying I have multi-sourced the variable F1
 please help how to overcome this.

[eteam00]

In your entire design, only one process (an always block) or assign statement may change or assign the value of variable F1.

-- Bob Elkind

[gszakacs]

Perhaps you should post the code.  There have been other threads on multi-source

where it became obvious that XST has a bug in reporting the actual signal that is

multi-sourced.  "Referring to" signal F1 in any number of blocks is OK.  Assigning

a value to F1 can only happen in a single block.  Now suppose that in another block

you have assigned the value of F1 to another signal G1.  Then further suppose that

G1 is also assigned in another block or continuous assignment.  Then although

the problem is with G1, XST may report that F1 has multiple drivers because it

has already merged the two nets.

-- Gabor