Spartan® Family FPGAs

[gumph]

I'm new to FPGA. When I created programming file, there is a translate error for every net:  ERROR:NgdBuild:924 - bidirect pad net 'IO_RIGHT<14>' is driving non-buffer  primitives:

What does thes error mean? How to solve it?

Thanks in advance, gumph

[mcgett]

The error message indicates that an external pin is driving something other than an IBUF, IBUFDS or IOBUF input buffer.  The likely cause is that when the design was synthesized the IO buffer insertion was disabled.

[gumph]

Thanks mcgett, could you direct me to a document or a link talking about IBUF, IBUFDS or IOBUF? Sorry I'm new to FPGA and don't even know what IBUF, IBUFDS or IOBUF are. I wish to realize a muxing function without any clock involved. Thanks again, gumph

[mcgett]

These primitives are input buffers that connect external signals to the internal logic.  Usage can be found in the Lirbaries Guide

http://www.xilinx.com/support/documentation/dt_ise11-1.htm

[gumph]

Thanks a lot! How can avoid IO buffer insertion being disabled when the design was synthesized? or how can I enable IO buffer insertion? Regards, gumph

[bkazour]

To do that,

before synthesizing do the following:

1. right click on "Synthesize" and choose properties 
2. Choose "Xilinx specific option"
3. check the first row " Add IO buffers"

Note that this is done using xilinx 10.1 which is the version i have, i don't know if it differs in previous versions !

[gumph]

Thanks bkazour, I checked my settings and add IO buffers already being selected. Anything else might be helpful? Regareds,

Zebin