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Visitor
dandooshe
Posts: 24
Registered: ‎11-22-2010
0
Accepted Solution

ROL logic operator library

Hi,
please I have a question, maybe it's very simple but I couldn't find the answer.

I need to use ROL logic operator, but I'm still getting the same error:
ROL can not have such operands in this context.

 

I have tried to use these libraries:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.std_logic_arith.all;
use IEEE.numeric_std.all;


And I have tried to use operands of type STD_LOGIC_VECTOR and STD_ULOGIC_VECTOR (as I read in the designer's guide to VHDL book), but I'm still getting that error.

y <= x ROL 3;
Also I have tried integers other than 3, but nothing.

Please can anyone help me with this.

Thanks.

Dina

Expert Contributor
pumaju1808
Posts: 368
Registered: ‎08-14-2007

Re: ROL logic operator library

 

I think this kind of instruction works only for bit_vector type, try to use bit_vector instead STD_LOGIC_VECTOR

 

regards

Visitor
dandooshe
Posts: 24
Registered: ‎11-22-2010
0

Re: ROL logic operator library

It works... great  :-)

Thank you very much.

 

Expert Contributor
eilert
Posts: 2,344
Registered: ‎08-14-2007
0

Re: ROL logic operator library

Hi

If you want to avoid type conversions you can do it also this way:

 

mysig <= mysig (mysig'length-1-rolwidth downto 0) & mysig(mysig'lenght-1 downto mysig'length-rolwidth );

 

Of course if you like to have the operator in your code, for better readability, you can put this line in a function.

 

Have a nice synthesis

  Eilert

Moderator
hongh
Posts: 55
Registered: ‎11-04-2010
0

Re: ROL logic operator library

If you want to keep the IO of module being STD_LOGIC_VECTOR, you can use To_StdLogicVector to change the internal signal type to STD_LOGIC_VECTOR.

Ex: data_out <= To_StdLogicVector(temp);

Expert Contributor
rcingham
Posts: 2,115
Registered: ‎09-09-2010
0

Re: ROL logic operator library

The equivalent/replacement function for the ieee.numeric_std package is 'rotate_left', which is defined for both signed and unsigned types (but not std_logic_vector). You could the operation do with casts all in one line, though:


data_out  <= std_logic_vector(rotate_left(unsigned(data_in), 3));


The second parameter need not be a constant, but if it is a signal then it will infer a barrel shifter, which is a lot of logic!

 


------------------------------------------
"If it don't work in simulation, it won't work on the board."
Visitor
dandooshe
Posts: 24
Registered: ‎11-22-2010
0

Re: ROL logic operator library

Thank you very much for your replys :)