05-09-2012 05:59 AM
I need to know the number of gates in the RTL schematic of my design after synthesis with XST. I only got a comprehensive design summary/report about the FPGA implementation. I need to know the RTL gate count first.
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05-09-2012 06:04 AM
"Gate" counts mean nothing in an FPGA. If you are eventually going to move this
design to an ASIC, then you should use the ASIC design tools to give you an
accurate gate count for the intended target architecture.
By the way, there are a lot of threads on this subject. You should search the forum
for "gate count" for more information.