Synthesis

[nissignt]

I am new at vhdl. My task is to make a 4 channel multiplexer with a resolution signal of the choice of channel number

 the code below has the following error :

Error (10405): VHDL error at four_bit_MX.vhd(23): can't determine type of object at or near identifier "conv_integer" -- found 0 possible types

The program

library ieee;
use ieee.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned;

entity four_bit_mx is
port (
I0,I1,I2,I3: IN std_logic_vector (3 downto 0);
Q : Out std_logic_vector(3 downto 0);
U : IN std_logic_vector (3 downto 0);
R : IN std_logic
);
end entity;

architecture behavior of four_bit_mx is
constant noneactive : std_logic_vector(3 downto 0):= (others => '0');
begin
Process (I0,I1,I2,I3,U,R)
begin
If (R='0')then Q<=noneactive;
Else

case conv_integer (U) is
When 0 => Q <=I0;
When 1 => Q <=I1;
When 2 => Q <=I2;
When 3 => Q <=I3;
When Others => Q <=noneactive;
end case;
end If;
end Process;
end architecture behavior;

seriously need help

[viviany]

Is it a simulation error?

Vivian

[mbentivegna]

According to what I found, STD_LOGIC_VECTOR cannot be converted to an integer because it cannot determine if the value is signed or unsigned.

One recommendation would be to change 'U' to be type "unsigned" as such:

   U : IN unsigned (3 downto 0);

The "unsigned" data type has the appearance of STD_LOGIC_VECTOR, but can accept arithmetic operations.

This solution might require further tweaks in your code to get the functionality working as you desire, but I hope this at least aims you in the right direction!

[bassman59]

---

mbentivegna wrote:

According to what I found, STD_LOGIC_VECTOR cannot be converted to an integer because it cannot determine if the value is signed or unsigned.

One recommendation would be to change 'U' to be type "unsigned" as such:

   U : IN unsigned (3 downto 0);

The "unsigned" data type has the appearance of STD_LOGIC_VECTOR, but can accept arithmetic operations.

This solution might require further tweaks in your code to get the functionality working as you desire, but I hope this at least aims you in the right direction!

---

The unsigned type (as well as the signed type, and various conversion and utility functions) are part of the ieee standard package numeric_std, and that package should be used in preference to the archaic and problematic std_logic_arith.

[bassman59]

---

nissignt wrote:

I am new at vhdl. My task is to make a 4 channel multiplexer with a resolution signal of the choice of channel number

 the code below has the following error :

Error (10405): VHDL error at four_bit_MX.vhd(23): can't determine type of object at or near identifier "conv_integer" -- found 0 possible types

The program

library ieee;
use ieee.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned;

entity four_bit_mx is
port (
I0,I1,I2,I3: IN std_logic_vector (3 downto 0);
Q : Out std_logic_vector(3 downto 0);
U : IN std_logic_vector (3 downto 0);
R : IN std_logic
);
end entity;

architecture behavior of four_bit_mx is
constant noneactive : std_logic_vector(3 downto 0):= (others => '0');
begin
Process (I0,I1,I2,I3,U,R)
begin
If (R='0')then Q<=noneactive;
Else

case conv_integer (U) is
When 0 => Q <=I0;
When 1 => Q <=I1;
When 2 => Q <=I2;
When 3 => Q <=I3;
When Others => Q <=noneactive;
end case;
end If;
end Process;
end architecture behavior;

seriously need help

---

You're overcomplicating matters. Don't bother converting the mux-select vector U to an integer. Just use it as is:

    mux : process (I0,I1,I2,I3,U,R) is

    begin 
        If  R = '0' then

            Q <= noneactive; 
        else

            Decoder : case U is
                when "0000" => Q <= I0;
                when "0001" => Q <= I1;
                when "0010" => Q <= I2;
                when "0011" => Q <= I3;
                when others => Q <= noneactive;
            end case Decoder;
        end If;
    end process mux;

Of course, if you only have four inputs from which to choose, there's no particular reason to have a four-bit mux select. Two bits suffice.