Synthesis

[michaelfpga]

Hi all

I am writing a vhdl code, I need to run a counter, I have seen a code segment that increments a 3 bit counter like this 

counter <= ext(ext(counter,32) + 1,abs(2-0)+1)

can we write it

counter<= counter+'1' ??

why the ( ext and abs) are used??

thanks

[gszakacs]

You didn't post the declaration of "counter," but I'm guessing it was a std_logic_vector(2 downto 0).

Please see this post about counters in VHDL.

-- Gabor

[rourabpaul]

yah i think its right