03-03-2010 12:44 AM - edited 03-03-2010 01:35 AM
I am using Xilinx ISE 11.4 and the FIR Compiler 5.0 IP Core on a Virtex5.
The filter is set up in a 128 Channel Polyphase filter bank receiver configuration with 16 bit signed input samples.
The output is 33 bits (full precision) and the sum of my filter coefficients is 1.
When simulated, the output is fine until a certain threashold value. Once the filter output reaches a length of 22 bits or more, there is a truncation error even though the output precision is 33 bits. The error is as follows:
# ** Warning: NUMERIC_STD.TO_SIGNED: vector truncated
# Time: 39995 ns Iteration: 4 Instance: /polyphase_filter_testbench/uut/filter/u0/g_mac/ma
This error occurs when 16 bit coefficients are used. 18 bit coefficients at full precision (35 bit) work fine.
I've gone through the xilinx answers database and have not been able to find any solution for this error, hopefully someone here can shed some light on the subject!