Just to clarify what rcingham is suggesting:
If you constrain the input clock that drives the DCM, TRCE will automatically derive
constraints for the output clocks based on the actual frequencies and phase relationships
programmed.
TRCE will also handle cross-clock-domain paths as requiring setup and hold to the
other clock given these frequencies and phase relationships. For example it understands
that your two clocks will line up on every third cycle of the 540 MHz clock.
If your design treats these clocks as unrelated (you use synchronizers and FIFO's as
necessary to cross clock domains), then you will need to ignore some of these cross-clock-domain
derived constraints by adding "TIG" constraints or FROM : TO constraints between the
clock domains. Thos user constraints will override the derived constraints.
If your design relies on the phase relationship between clocks, then you only need the
input clock period constraint, and don't need to add other constraints between clocks.
-- Gabor
-- Gabor
