Yes I will.
By the way I also found another innapropriate behavior with the DSP Macro when using registering on CONCAT (=D:A:B) input. I wanted to have one register activated inside DSP48A1, and one outside (because the signal is coming from another DSP which is far on the FPGA die).
As a result D was registered correctly, but not A and B. Indeed the DSP input A and B were connected directly to the unregistered CONCAT input without using the FDR primitive output, and the 2 A/B DSP registers were all active instead .
It ended up with a huge amount of logic moving on one side of the FPGA to reduce the distance between DSPs, resulting in many other problems and finally some timing errors.
It took me one day to figure that out, so I'm just thinking that the DSP Macro which I thought had saved me some precious time is actually wasting even more right now.
So before reporting this in a webcase, I just want to warn the other users about using this DSP Macro IP carefully (and maybe advise them not to use it at all until this kind of bugs are corrected).
