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error 31
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05-02-2012 03:57 AM
Hi, I don't understand because I recived this error. This is the report with timing analyzer
Slack: -122.108ns (requirement - (data path - clock path skew + uncertainty))
Source: B828_funzioni_hcc_131_inv_molt_DTYPE0_s2_bit_0_ (FF)
Destination: B514_funzioni_hcc_131_inv_molt_DTYPE0_q_bit_31_ (FF)
Requirement: 39.721ns
Data Path Delay: 161.829ns (Levels of Logic = 546)
Clock Path Skew: 0.000ns
Source Clock: WG2_rc200_hch_148_ClockInput_O rising at 0.000ns
Destination Clock: WG2_rc200_hch_148_ClockInput_O rising at 39.721ns
Clock Uncertainty: 0.000ns
Timing Improvement Wizard
Data Path: B828_funzioni_hcc_131_inv_molt_DTYPE0_s2_bit_0_ to B514_funzioni_hcc_131_inv_molt_DTYPE0_q_bit_31_
please help me. Thanks
Solved! Go to Solution.
Re: error 31
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05-02-2012 04:36 AM
Data Path Delay: 161.829ns (Levels of Logic = 546)
Wow! That's a lot of levels of logic for a combinatorial path. Are you using loops in your code?
Also you didn't post the error message (where did you get "error 31")?
-- Gabor
Re: error 31
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05-02-2012 06:13 AM
Take a course on Digital Logic Design.
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"If it don't work in simulation, it won't work on the board."
Re: error 31
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05-02-2012 07:22 AM
I have resolved the problem. The result now is this.
Data Path Delay: 30.778ns (Levels of Logic = 32)
thanks











