08-20-2007 11:37 AM
08-20-2007 03:04 PM
08-20-2007 03:17 PM
3. 80, 40, 20, 10, 5, or 2.5MHz based on 3-bit select
4. 120, 60, 30, 15, 7.5, or 3.75MHz based on 3-bit select
The selectable clocks are always in pairs such as 80/120, 40/60, 20/30, etc. I was thinking that I could probably get away with saving some DCM's by using registers, but I'm beginning to think it may not be the best solution. I should be able to generate all the clocks I need with a total of 4 DCM's, and the part has 12 total so I think I should be ok. The main thing I'm worried about are the quadrant rules associated with global clock buffers in these parts. I was thinking about doing a 6:1 MUX using standard logic for each of the selectable clocks and taking the MUX output to a BUFG.
08-20-2007 03:24 PM