Virtex® Family FPGAs

[mvly]

1) Voltage levels in AL33 was -200mV to 2V according to my Oscope. But since I moved to AJ34, a IO...CC port, it is not going from -200mV to 3V which is expected.

2) I set the IOSTANDARD to LVCMOS33 and I am using an Eval Board, so I would expect the logic level to be 3.3V

3) I haven't tried routing the clock back out to a header to see with my scope. I will do that next.

[mcgett]

> 2) I set the IOSTANDARD to LVCMOS33 and I am using an Eval Board, so I would expect the logic level to be 3.3V

The IOSTANDARD attribute does not override the physical conditions that the FPGA is set to.  What is the actual voltage on the VCCO_EXP rail?

[mvly]

More update, it looks like chipscope does show the clock input after changing to IO...CC, But none of the logic clocked to that input Clk does not work. (i.e. Register/counter/etc)