09-14-2009 11:06 AM
Hi everybody, I'm new here and this is my first post question.
My question concerns the filtering for powering the MGTs of the Virtex-6. In the ug366.pdf pages 193-194 it suggest some specific capacitor values for the MGTAVCC and MGTAVTT sources, so, it is needed just these capacitors and no inductors/ferrites for the filters? As in the previous version (ug076.pdf page 177, e. g. ) the filtering is made by using individual pins LC filters for the MGTs, I would clarify that this is no more required for V-6 MGTs implementations, and just the decoupling capacitors are enough? Thank you for any help given!
p.s.: sorry about my english errors, I'm a brazilian hardware developper ;-)
Solved! Go to Solution.
09-22-2009 09:00 AM
Yes, this is true. The Virtex-6 MGT power does not need the LC filters recommended by previous families. However, in addition to the recommended capacitors, be sure to follow the recommendations of creating "power islands" for MGTAVCC and MGTAVTT preferably sandwiched between two ground planes and isolated from other signals and signal vias. These can be created using a split plane to create islands only in the area on the MGTs. In the V6, this is delineated by a row of ground pins that stretch across the part. Also, care must be taken to follow recommendations for the choice of power supply and its noise characteristics. Xilinx however now even has qualified some Linear Technology low-noise switching supply modules for this as well as giving recommendations on choosing a linear supply.
My company has recently completed our V6 board layout and are using this power island approach without LC filters.
p.s: A late change in our design called for a change in package from the 1759 pin package to the 1156 pin package. This left us with one unused early access XC6VLX240T-1ff1759CES engineering sample silicon part that we will not be using. Anyone interested in purchasing it can find in for sale this week on ebay.com.