Virtex® Family FPGAs

[hakanaydin]

Regarding UG203: http://www.xilinx.com/support/documentation/user_guides/ug203.pdf

In Table 2-2: Required PCB Capacitor Quantities per Device: LXT Devices, for LX30T-FF665 device, the "Total" column says 11 capacitors for the device. However, this device has 12 IO banks. Therefore, shouldn't the Total column be 12+1+1 = 14 ?

[austin]

h,

In some packages, not all banks can be connected.

[hakanaydin]

Austin,

I'm not sure what you mean. I did mention the package in my question: FF665. Looking at the documentation, the package appears to ve 12 VCCO inputs. Those are:VCCO_0, 1 2 3 4 11 12 13 15 16 17 18.  That makes a total of 12.

[mcgett]

Bank 0 is the dedicated configuration pins bank.  It is not an I/O bank.

[hakanaydin]

In that case, that would make 11 VCCO capacitors plus 1 for VCCINT and 1 for VCCAUX, which is a total of 13. Still doesn't match the total number given in ug203 (which is 11 total).

[mcgett · Accepted solution]

From the UG203 just above the table:

VCCO capacitors are listed as the quantity per 40-pin I/O bank (two 20-pin I/O banks can share the capacitors specified for one 40-pin I/O bank).

The FF665 has 360 I/O pins / 40 = 9 effective banks, 9 + 1 + 1 = 11 capacitors.

[hakanaydin]

Thank you, now it makes sense.