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Quickly clock in an architectu re
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07-06-2012 04:44 AM
Hello everyone,
I would like to know if it is possible to deduct a four times faster clock from an input clock in an architecture. In fact I would like to use a clock for a process and a four times faster for an other.
Thanks a lot.
Re: Quickly clock in an architectu re
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07-06-2012 05:06 AM
Yes, this is simple to implement, subject to datasheet limits for the target device.
There is a ClockGen Wizard in the Xilinx ISE toolset for generating the correctly configured clock generator primitive.
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
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Re: Quickly clock in an architectu re
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07-06-2012 11:08 PM
I would like to know if it is possible to deduct a four times faster clock from an input clock in an architecture. In fact I would like to use a clock for a process and a four times faster for an other.
which arcitecture you are targetting ?
You can use pll and dcm wizard to generate the desired clock.
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