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Visitor
guetguet
Posts: 24
Registered: ‎07-04-2012
0

Quickly clock in an architecture

Hello everyone,

 

I would like to know if it is possible to deduct a four times faster clock from  an input clock in an architecture. In fact I would like to use a clock for a process and a four times faster for an other.

 

Thanks a lot.

Expert Contributor
eteam00
Posts: 7,505
Registered: ‎07-21-2009
0

Re: Quickly clock in an architecture

Yes, this is simple to implement, subject to datasheet limits for the target device.

There is a ClockGen Wizard in the Xilinx ISE toolset for generating the correctly configured clock generator primitive.

 

-- Bob Elkind

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Expert Contributor
sushantm
Posts: 284
Registered: ‎04-02-2011
0

Re: Quickly clock in an architecture


I would like to know if it is possible to deduct a four times faster clock from  an input clock in an architecture. In fact I would like to use a clock for a process and a four times faster for an other.

 

 


 

which arcitecture you are targetting ?

 

You can use pll and dcm wizard to generate the desired clock.

--Sushant Mahajan
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