Virtex® Family FPGAs

[rick.b.brown]

I haven't been able to find an answer to this yet.  How does one control the DCI source termination value when running a simulation such as in Hyperlynx?  For example, I want to run some pre-layout simulations using an LVDCI_33 output to a TTL receiver across a PCB trace.  Do I need to explicitly place a termination resistor in my Hyperlynx schematic or can this be controlled with the model file?  Trying to find the optimal resistors to use for VRN and VRP.

[austin · Accepted solution]

Rick,

Checking my recent Hyperlynx simulations, the IBIS models provided are for  LVDCI output, using 50 ohm resistors.  So, the IO is driving with a source resistance of 50 ohms.

If you want to try different regerence resistors, that is not something you can do with the IBIS models.

You could do this using the encrypted hspice models.

If you design a pcb for 68 ohm traces (for example) then you should use 68 ohm reference resistors.  Simulating this in Hyperlynx can be done by adding an 18 ohm series resistor to the output of the 50 ohm LVDCI model (50+18=68), or by using the hspice models with 68 ohm reference resistors.