09-24-2007 01:10 AM
09-24-2007 06:54 AM
If you have modelsim, you can view the memory in the list window at some point during your simulation, and I think you can copy/paste the values, or dump them to a textfile.
Personally, I avoid coregen for memories, just infer them. Then if I need to see what's going on, I can put print statements in my HDL code, with a unique prefix and then grep them our of the logfiles for further processing.
09-24-2007 07:19 PM
Sysgen can comunicat with the FPGA Board and Matlab.
I don't know deep of this tool. You can open a WebCase to the Xilinx experts.
For general usage, a UART is also easy to implement in FPGA.
Use UART to send out data to PC.
There are a lot of SCom tools to receive data from UART.
Then you can copy/paste data to Matlab.
09-26-2007 03:29 AM
You sent me an emil about htis yesterday, but I fumbled my reply (Groupwise has the short cut for "shred irretrievably" on the key next to "Reply" - I need to get a hex editor on the executable I think!) and I've now lost your mail.
Please resend it and I'll reply (hopefully!)