Virtex® Family FPGAs

[rty]

Hello.

Excuse me for disturbing you, I have a question again :-).

I should develop a board with multiboot capability.

The IC is XC6VLX240, so the bitstream size is 73,859,552 bits.

I would like to store at least 2 bitstreams in one flash, so the best choice could be 256Mbits flash.

Parallel flash is undesirable due to many pins used for interface with it, so I would like to use SPI Flash, for example N25Q256.

As I understood, the maximum SPI Flash capacity supported by IMPACT is 128 Mbit.

The maximum address that can be stored in START_ADDR[23:0] for transmitting to SPI Flash is 16777215, i.e. it can't address upper half of 128 Mbit Flash.

So, the questions are:

1) Will IMPACT support 256 Mbit SPI Flash in the nearest future? (monthes)

2) Can Virtex-6 boot from the 256-Mbit SPI flash?

3) Can Virtex-6 boot from the flash addresses greater than 16777215?

For example, if I will write the first bitstream at the address 0x000000, and the second - from 0xC00000 (up to the address 0x14CE03C).

So I will write to START_ADDR[23:0] = 0xC00000. After warm reboot, it will start loading the data from 0xC00000.

Is it possible for Virtex-6 to continue reading data above the address 0xFFFFFF (up to the end of the second bitstream - 0x14CE03C), or there are possible some problems with it?

Thank you very much for answers!

[dbarrowman]

Hi,

I have the same questions and need to store 2 bit files of a large FPGA. But it does look like ISE 14.1 does support the N25Q256, 256Mbit SPI flash, and it's the ONLY one supported. Why are no other options supported?

It seems like Xilinx is also abandoning the Platform Flash XL since it's not getting larger, yet FPGAs require larger and larger configuration files? Your options are quite limited.

Regards,

Dan

[eteam00]

Why are no other options supported?

There are other options supported.

• List of SPI and BPI devices supported by 14.1 iMPACT is found here.
• FPGAs will configure from compatible memories which are not on the iMPACT list of supported devices.

As Platform Flash is a proprietary, single source device family, you should view the support of commodity SPI and BPI flash memory families as a welcome addition.  The non-proprietary devices provide better availability, cost, and density range.

-- Bob Elkind

[dbarrowman]

Hi,

I just wanted to report back that I was able to use the environment variable setting, XIL_IMPACT_SKIPIDCODECHECK=1, to skip the ID check and then I could program my SPI flash.

Using this, I can successfully program a 256Mbit Macronix SPI flash (MX25L25635EMI-12G), however, only using it as 128Mbit. Even with skipping the ID check, it apparently doesn't work for programming the entire flash, so you may still only have the N25Q256 option if you want to use indirect programming for a 256Mbit SPI flash. Note, this is ISE 14.1. I believe it's the first release to support > 128Mbit SPI serial flash (for indirect programming).

However, for my purposes, this is a good enough solution for bring up/debug since I only need to program one load.

Regards,

Dan