Sign In

Don't have a Xilinx account yet?

  • Choose to receive important news and product information
  • Gain access to special content
  • Personalize your web experience on Xilinx.com

Create Account

Username

Password

Forgot your password?
XClose Panel
Xilinx Home
Reply
Visitor
arpitkg
Posts: 2
Registered: ‎04-15-2011
0

Xilinx Virtex-6 ML605 Board FMC connector IO standard

Hi all,

 

I am trying to get HSTL_I at the FMC LPC connector pins for my requirements. But it seems to me that one can only get LVDS or LVCMOS25 at FMC LPC connector.

 

My question is: Is it posible to get any other IOstandard at FMC LPC connector for ML605 kit? If yes, then what other IO standards can be achieved at FMC LPC pins?

 

I will really appreciate any help in this regard.

 

thank you.

Xilinx Employee
mcgett
Posts: 3,494
Registered: ‎01-03-2008
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

The VCCO of the IO banks connected to the FMC connectors on the ML605 is 2.5V.  This means that only 2.5V IO standards are allowed.

------------------------------------------------------------------
Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
Expert Contributor
eteam00
Posts: 7,505
Registered: ‎07-21-2009
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

For a list of available 2.5V-compatible IOSTANDARD selections, see DS152, Tables 7 through 11.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Visitor
arpitkg
Posts: 2
Registered: ‎04-15-2011
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

thank you for your responses.

 

I am also trying to connect an external LVDS clock input at J58 and J55 at ML605. I use this external clock as reference clock to get user defined data at FMC LPC pins. What is maximum clock frequency that can be applied at J58/J55? Also, what is maximum FMC LPC output data rate for ML605 for LVDS/LVCMOS25 standards?

 

thanks & regards!

Expert Contributor
eteam00
Posts: 7,505
Registered: ‎07-21-2009
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

[ Edited ]

What is maximum clock frequency that can be applied at J58/J55? Also, what is maximum FMC LPC output data rate for ML605 for LVDS/LVCMOS25 standards?

There are two answers for your questions:

  1. The Virtex-6 datasheet, DS152.  You should download it and search for the answers to your questions.  I could look this up for you... but really...  this is your job (and design), not mine.  Agreed?
  2. The ML605 board layout, and connectors' electrical characteristics.

J55 and J58 are high-quality high-bandwidth connectors, they can probably support up to 1GHz or maybe higher.

 

I don't know what bandwidths the FMC connector can support.  I don't think you'll get 'minimum bandwidth' guarantees on these, you'll likely need to apply your own engineering judgment and experience.

 

Hope this helps.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Visitor
dburke
Posts: 2
Registered: ‎02-09-2012
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

Is this true? 

 

In the ML605 schematics on P. 7 the VCCO for Bank 12 is sourced by the FMC card, I believe. 

 

Although UG534 P. 16 has a table showing a voltage of 2.5V, the note says this is a value not to *exceed*, and I see no other connection to VIO_B_M2C other than the FMC connector J64.  Thus LVCMOS18 should be supportable, unless I misunderstand.

 

Please reply and confirm one way or another--this is a pending issue with a current project.

 

Dan

Xilinx Employee
mcgett
Posts: 3,494
Registered: ‎01-03-2008
0

Re: Xilinx Virtex-6 ML605 Board FMC connector IO standard

Yes, this would be supported.

------------------------------------------------------------------
Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com