Guidance about simulation of verilog code for AES-128

omerbashir · ‎05-28-2012

Hi, I am having the verilog code for AES-128. I am using ISE 10.1 and by using it I can successfully synthesize the code and can also generate the .bit file to download on the FPGA, but I cannot simulate the code. Can someone help me in this regard? I will be very grateful. Thank you.

joelby · ‎10-05-2010

Which code? Have you asked the author of the code for help? Do you understand how the code works and how to use ISim or ModelSim and test benches?

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Guidance about simulation of verilog code for AES-128

Re: Guidance about simulation of verilog code for AES-128