Xilinx Boards and Kits

[andy.qualls]

I am attempting to implement a design on the ML605 Eval Board.  However, when I attempt to place an IBUFGDS using the SGMIICLK at the H5 and H6 loccations I get a PACK1107 error.

Obviously, looking at the ML605 schematics the signals SGMIICLK_Q0_P and SGMIICLK_Q0_N are routed to H5 and H6.

The master ucf file contained in the board documentation has those signals placed at those locations.

Am I attempting to instantiate the wrong kind of input buffer?  Is there some other setting that I am overlooking?

[gszakacs]

If these pins are a GTP or GTX reference clock, then you need to use an IBUFDS without the "G".

The IBUFGDS is only for fabric global clock inputs.

-- Gabor

[andy.qualls]

I modified the instantiation and changed it from an IBUFGDS to IBUFDS and I still get the same error.

[gszakacs]

Can you post the complete text of the Pack error?  Note that if the error has multiple

lines, you may not see all of it in the messages view or the error tab.  Then instead

you should look directly at the report file for the full text.

-- Gabor

[mcgett]

>  when I attempt to place an IBUFGDS using the SGMIICLK at the H5 and H6 loccations I get a PACK1107 error.

You are using the wrong primitive.  The V-6 GTX User Guide, UG366, documents the correct usage in the Reference Clock Input Structure section which is a IBUFDS_GTXE1