04-12-2012 07:22 PM
We are examinig to use ML605. We would like it if you provide a length of LVDS between FPGA to FMC connector.
You have at least two options. From the ML605 documentation page,
- You can download the gerber files
- You can download the Allegro .BRD file in the freeware AllegroViewerPlus viewer. The viewer provides net searches and net length reports, and much more.
For either download, you will need to be registered on the Xilinx website.
You will also need the ML605 board schematics. Be sure to match the board revision of the schematics with the ML605 board revision you are using.
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
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