Hello,
So I didn't know wether it was best to start a new thread for this highly related question. I wrote my own driver in VHDL for the ADC and DAC, where the former is very similar to the one in adc2.rar.
Three questions:
- I'm actually a bit puzzled about how to connect the DAC and ADC to the Microblaze, since i´d assume i'd still have to use some sort of FSL/OPB/PLB bus to somehow talk to the device using the ADC and DAC drivers, which use SPI. What to do here?
- Also, does anyone have a simple sample code in C to communicate with the ADC (i.e. read data into a variable etc.) ?
I notice that the timing requirements of the DAC allows me to run the SPI bus at 50 MHz, while the ADC does not. Is the reason for the counters in adc2.vhd in adc2.rar to establish some sort of delay?
My design originally used a clock divider instead though... but i have modified it to the same as adc2.vhd.
I have searched this forum, and did find something regarding question 2: http://forums.xilinx.com/t5/EDK-and-Platform-Studio/ADC-DAC-Tutorials/td-p/44909 but it seems like they used the already availabe delta-sigma ADC IP core in XPS for this...
