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Solutions
 
Subject Replies Author Kudos Solved Date/Time
This is a topic with new unread messages
Solved!

Zynq error on allocation of BUFG resources on bott... - ( ‎05-21-2013 02:37 AM )

7 Series FPGAs
Hi,   I am mapping an input clock to the pin "W18" of a xc7x020clg484-1. During mapping the BUFG is allocated to a clock resource from the top side BUFGCTRL_X0Y23 and it returns an error sa...
4 0 ‎05-21-2013 08:50 AM
This is a topic with new unread messages
Solved!

C source code for XADC Xilinx SDK. - ( ‎05-19-2013 07:24 PM )

7 Series FPGAs
I want to access XADC on the Zynq ZC702 using a C application written on Xilinx SDK. The problem is that I only have the header files and C functions in my hand, no sign of an example source code tha...
2 0 ‎05-20-2013 08:47 AM
This is a topic with new unread messages
Solution

Re: MGT power - ( ‎05-13-2013 07:13 AM )

7 Series FPGAs
v,   If they are the same voltage, yes.  But you still need to follow the ferrite bead and bypassing rules.    
3 0 ‎05-13-2013 08:34 PM
This is a topic with new unread messages
Solution

Re: LOC constraint value for IBUFDS_GTE2 - ( ‎05-06-2013 09:09 AM )

7 Series FPGAs
Remove the INST constraint and replace it with NET constraints for the refclock inputs with LOC values of D5 and D6.
1 0 ‎05-06-2013 06:04 PM
This is a topic with new unread messages
Solved!

7-series carry chain delays - ( ‎02-20-2013 05:46 PM )

7 Series FPGAs
Where can I get delay of Cin-Cout (Tbyp) for 7 series? There is no Tbyp specification  in vertex-7 datasheet.   Any help would be appreciated.
2 0 ‎04-26-2013 03:52 AM
This is a topic with new unread messages
Solved!

GTX Transceiver Example - ( ‎04-17-2013 06:57 AM )

7 Series FPGAs
Dear Community,   i start designing and using the GTX transceiver example offered when implementing the ip-core with ISE 14.5 . I use the Kintex Evalboard KC705 with an FM-S14 adapter (offers me 4 mo...
6 0 ‎04-19-2013 03:09 AM
This is a topic with new unread messages
Solved!

Can Zynq Gigabit Ethernet MAC interface 10/100Mbp... - ( ‎04-13-2013 12:55 AM )

7 Series FPGAs
Hi all,     I wanna use Zynq Gigabit Ethernet MAC interface a 10/100Mbps PHY by MII or RMII. Is that feasible?     Thanks a lot!
2 0 ‎04-16-2013 05:36 PM
This is a topic with new unread messages
Solved!

programmable interconnect - ( ‎03-31-2013 01:51 PM )

7 Series FPGAs
I search for documentation about programmable interconnect strcture of Zynq7000.   Unfortuanelty I didn't find anythinf about it.   Does this connection fabric consits of CMOS transistors?
3 0 ‎04-08-2013 01:34 AM
This is a topic with new unread messages
Solved!

Zynq Tvcco2vccaux - ( ‎04-05-2013 05:26 AM )

7 Series FPGAs
I see that the Tvcco2vccaux in the zynq datasheet is based on thousands of power cycles.  In the system I am designing I may have a situation in which Vcco is 3.3V for several seconds while Vccaux is...
8 0 ‎04-05-2013 07:49 AM
This is a topic with new unread messages
Solved!

"Part Compatibility" vs. "Footprint Compatible" - ( ‎03-18-2013 11:34 AM )

Message contains a hyperlink
7 Series FPGAs
..."footprint compatible" used in documentations such as http://www.xilinx.com/publications/prod_mktg/Virtex7-Product-Table.pdf.   In the pdf file, and in the "part compatibility" (from...
2 0 ‎04-03-2013 03:42 PM