PARAMETER VERSION = 2.1.0


 PORT RESET = RESET, DIR = I, SIGIS = RST, RST_POLARITY = 1
 PORT CLK_P = CLK, DIR = I, DIFFERENTIAL_POLARITY = P, SIGIS = CLK, CLK_FREQ = 200000000
 PORT CLK_N = CLK, DIR = I, DIFFERENTIAL_POLARITY = N, SIGIS = CLK, CLK_FREQ = 200000000
 PORT RS232_Uart_1_sout = RS232_Uart_1_sout, DIR = O
 PORT RS232_Uart_1_sin = RS232_Uart_1_sin, DIR = I
 PORT DIP_Switches_4Bits_TRI_I = DIP_Switches_4Bits_TRI_I, DIR = I, VEC = [0:3]
 PORT LEDs_4Bits_TRI_O = LEDs_4Bits_TRI_O, DIR = O, VEC = [0:3]
 PORT GPIO_HDR_TRI_O = GPIO_HDR_TRI_O, DIR = O, VEC = [0:7]
 PORT Push_Buttons_4Bits_TRI_I = Push_Buttons_4Bits_TRI_I, DIR = I, VEC = [0:3]
 PORT IIC_EEPROM_SDA = IIC_EEPROM_SDA, DIR = IO
 PORT IIC_EEPROM_SCL = IIC_EEPROM_SCL, DIR = IO
 PORT SPI_FLASH_SCLK = SPI_FLASH_SCLK, DIR = IO
 PORT SPI_FLASH_MOSI = SPI_FLASH_MOSI, DIR = IO
 PORT SPI_FLASH_MISO = SPI_FLASH_MISO, DIR = IO
 PORT SPI_FLASH_SS = SPI_FLASH_SS, DIR = IO
 PORT mpmc_0_mcbx_dram_addr_pin = mpmc_0_mcbx_dram_addr, DIR = O, VEC = [12:0]
 PORT mpmc_0_mcbx_dram_ba_pin = mpmc_0_mcbx_dram_ba, DIR = O, VEC = [2:0]
 PORT mpmc_0_mcbx_dram_ras_n_pin = mpmc_0_mcbx_dram_ras_n, DIR = O
 PORT mpmc_0_mcbx_dram_cas_n_pin = mpmc_0_mcbx_dram_cas_n, DIR = O
 PORT mpmc_0_mcbx_dram_we_n_pin = mpmc_0_mcbx_dram_we_n, DIR = O
 PORT mpmc_0_mcbx_dram_cke_pin = mpmc_0_mcbx_dram_cke, DIR = O
 PORT mpmc_0_mcbx_dram_clk_pin = mpmc_0_mcbx_dram_clk, DIR = O, SIGIS = CLK
 PORT mpmc_0_mcbx_dram_clk_n_pin = mpmc_0_mcbx_dram_clk_n, DIR = O, SIGIS = CLK
 PORT mpmc_0_mcbx_dram_dq = mpmc_0_mcbx_dram_dq, DIR = IO, VEC = [15:0]
 PORT mpmc_0_mcbx_dram_dqs = mpmc_0_mcbx_dram_dqs, DIR = IO
 PORT mpmc_0_mcbx_dram_dqs_n = mpmc_0_mcbx_dram_dqs_n, DIR = IO
 PORT mpmc_0_mcbx_dram_udqs = mpmc_0_mcbx_dram_udqs, DIR = IO
 PORT mpmc_0_mcbx_dram_udqs_n = mpmc_0_mcbx_dram_udqs_n, DIR = IO
 PORT mpmc_0_mcbx_dram_udm_pin = mpmc_0_mcbx_dram_udm, DIR = O
 PORT mpmc_0_mcbx_dram_ldm_pin = mpmc_0_mcbx_dram_ldm, DIR = O
 PORT mpmc_0_mcbx_dram_odt_pin = mpmc_0_mcbx_dram_odt, DIR = O
 PORT mpmc_0_rzq = mpmc_0_rzq, DIR = IO
 PORT mpmc_0_zio = mpmc_0_zio, DIR = IO


BEGIN proc_sys_reset
 PARAMETER INSTANCE = proc_sys_reset_0
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT Ext_Reset_In = RESET
 PORT MB_Reset = proc_sys_reset_0_MB_Reset
 PORT Slowest_sync_clk = clk_50_0000MHzPLL0
 PORT Interconnect_aresetn = proc_sys_reset_0_Interconnect_aresetn
 PORT Dcm_locked = proc_sys_reset_0_Dcm_locked
 PORT MB_Debug_Sys_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
 PORT BUS_STRUCT_RESET = proc_sys_reset_0_BUS_STRUCT_RESET
END

BEGIN plb_v46
 PARAMETER INSTANCE = plb_v46_0
 PARAMETER HW_VER = 1.05.a
 PORT PLB_Clk = clk_100_0000MHzPLL0
 PORT SYS_Rst = proc_sys_reset_0_BUS_STRUCT_RESET
END

BEGIN mytestlogic
 PARAMETER INSTANCE = mytestlogic_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x80000000
 PARAMETER C_HIGHADDR = 0x80000FFF
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
 PORT Base_addr = mytestlogic_0_Base_addr
 PORT init_code = mytestlogic_0_init_code
END

BEGIN mpmc
 PARAMETER INSTANCE = mpmc_0
 PARAMETER HW_VER = 6.03.a
 PARAMETER C_PORT_CONFIG = 1
 PARAMETER C_MCB_LOC = MEMC3
 PARAMETER C_MPMC_BASEADDR = 0x10000000
 PARAMETER C_MEM_PARTNO = EDE1116AXXX-8E
 PARAMETER C_MPMC_HIGHADDR = 0x17FFFFFF
 PARAMETER C_MEM_DATA_WIDTH = 16
 PARAMETER C_MCB_ZIO_LOC = P4
 PARAMETER C_MCB_RZQ_LOC = N4
 PARAMETER C_PIM1_BASETYPE = 4
 PARAMETER C_NUM_PORTS = 2
 BUS_INTERFACE SPLB0 = plb_v46_0
 BUS_INTERFACE MPMC_PIM1 = npi_interface_0_XIL_NPI
 PORT MPMC_Clk0 = clk_100_0000MHzPLL0
 PORT MPMC_Rst = proc_sys_reset_0_BUS_STRUCT_RESET
 PORT MPMC_Clk_Mem_2x = clk_300_0000MHzPLL0_nobuf
 PORT MPMC_Clk_Mem_2x_180 = clk_300_0000MHz180PLL0_nobuf
 PORT MPMC_MCB_DRP_Clk = clk_100_0000MHzPLL0
 PORT MPMC_PLL_Lock = proc_sys_reset_0_Dcm_locked
 PORT mcbx_dram_addr = mpmc_0_mcbx_dram_addr
 PORT mcbx_dram_ba = mpmc_0_mcbx_dram_ba
 PORT mcbx_dram_ras_n = mpmc_0_mcbx_dram_ras_n
 PORT mcbx_dram_cas_n = mpmc_0_mcbx_dram_cas_n
 PORT mcbx_dram_we_n = mpmc_0_mcbx_dram_we_n
 PORT mcbx_dram_cke = mpmc_0_mcbx_dram_cke
 PORT mcbx_dram_clk = mpmc_0_mcbx_dram_clk
 PORT mcbx_dram_clk_n = mpmc_0_mcbx_dram_clk_n
 PORT mcbx_dram_dq = mpmc_0_mcbx_dram_dq
 PORT mcbx_dram_dqs = mpmc_0_mcbx_dram_dqs
 PORT mcbx_dram_dqs_n = mpmc_0_mcbx_dram_dqs_n
 PORT mcbx_dram_udqs = mpmc_0_mcbx_dram_udqs
 PORT mcbx_dram_udqs_n = mpmc_0_mcbx_dram_udqs_n
 PORT mcbx_dram_udm = mpmc_0_mcbx_dram_udm
 PORT mcbx_dram_ldm = mpmc_0_mcbx_dram_ldm
 PORT mcbx_dram_odt = mpmc_0_mcbx_dram_odt
 PORT rzq = mpmc_0_rzq
 PORT zio = mpmc_0_zio
END

BEGIN lmb_v10
 PARAMETER INSTANCE = microblaze_0_ilmb
 PARAMETER HW_VER = 2.00.a
 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
 PORT LMB_CLK = clk_100_0000MHzPLL0
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00001fff
 BUS_INTERFACE SLMB = microblaze_0_ilmb
 BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
END

BEGIN lmb_v10
 PARAMETER INSTANCE = microblaze_0_dlmb
 PARAMETER HW_VER = 2.00.a
 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
 PORT LMB_CLK = clk_100_0000MHzPLL0
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00001fff
 BUS_INTERFACE SLMB = microblaze_0_dlmb
 BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
END

BEGIN bram_block
 PARAMETER INSTANCE = microblaze_0_bram_block
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
 BUS_INTERFACE PORTB = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
END

BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 8.10.a
 PARAMETER C_INTERCONNECT = 2
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_USE_FPU = 0
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_ICACHE_BASEADDR = 0x10000000
 PARAMETER C_ICACHE_HIGHADDR = 0x17ffffff
 PARAMETER C_USE_ICACHE = 1
 PARAMETER C_ICACHE_ALWAYS_USED = 1
 PARAMETER C_DCACHE_BASEADDR = 0x10000000
 PARAMETER C_DCACHE_HIGHADDR = 0x17ffffff
 PARAMETER C_USE_DCACHE = 1
 PARAMETER C_DCACHE_ALWAYS_USED = 1
 PARAMETER C_INTERCONNECT_M_AXI_DC_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DC_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DP_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DP_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DP_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DP_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DP_B_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DC_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DC_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_DC_B_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_IC_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_IC_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_IC_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_IC_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_M_AXI_IC_B_REGISTER = 1
 PARAMETER C_NUMBER_OF_PC_BRK = 1
 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 0
 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 0
 BUS_INTERFACE ILMB = microblaze_0_ilmb
 BUS_INTERFACE DLMB = microblaze_0_dlmb
 BUS_INTERFACE M_AXI_DP = axi4lite_0
 BUS_INTERFACE M_AXI_DC = axi4_0
 BUS_INTERFACE M_AXI_IC = axi4_0
 BUS_INTERFACE DEBUG = microblaze_0_debug
 PORT MB_RESET = proc_sys_reset_0_MB_Reset
 PORT CLK = clk_100_0000MHzPLL0
END

BEGIN mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.b
 PARAMETER C_INTERCONNECT = 2
 PARAMETER C_USE_UART = 1
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x74800000
 PARAMETER C_HIGHADDR = 0x7480ffff
 PARAMETER C_MB_DBG_PORTS = 1
 BUS_INTERFACE S_AXI = axi4lite_0
 BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
 PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
END

BEGIN clock_generator
 PARAMETER INSTANCE = clock_generator_0
 PARAMETER HW_VER = 4.01.a
 PARAMETER C_CLKIN_FREQ = 200000000
 PARAMETER C_CLKOUT0_FREQ = 300000000
 PARAMETER C_CLKOUT0_GROUP = PLL0
 PARAMETER C_CLKOUT0_BUF = FALSE
 PARAMETER C_CLKOUT1_FREQ = 300000000
 PARAMETER C_CLKOUT1_PHASE = 180
 PARAMETER C_CLKOUT1_GROUP = PLL0
 PARAMETER C_CLKOUT1_BUF = FALSE
 PARAMETER C_CLKOUT2_FREQ = 100000000
 PARAMETER C_CLKOUT2_GROUP = PLL0
 PARAMETER C_CLKOUT3_FREQ = 50000000
 PARAMETER C_CLKOUT3_GROUP = PLL0
 PORT RST = RESET
 PORT CLKIN = CLK
 PORT CLKOUT2 = clk_100_0000MHzPLL0
 PORT CLKOUT3 = clk_50_0000MHzPLL0
 PORT CLKOUT0 = clk_300_0000MHzPLL0_nobuf
 PORT CLKOUT1 = clk_300_0000MHz180PLL0_nobuf
 PORT LOCKED = proc_sys_reset_0_Dcm_locked
END

BEGIN axi_plbv46_bridge
 PARAMETER INSTANCE = axi_plbv46_bridge_0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_S_AXI_PROTOCOL = AXI4
 PARAMETER C_INTERCONNECT_S_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC
 PARAMETER C_S_AXI_RNG1_BASEADDR = 0x10000000
 PARAMETER C_S_AXI_RNG1_HIGHADDR = 0x17FFFFFF
 BUS_INTERFACE S_AXI = axi4_0
 BUS_INTERFACE MPLB = plb_v46_0
END

BEGIN axi_interconnect
 PARAMETER INSTANCE = axi4lite_0
 PARAMETER HW_VER = 1.02.a
 PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
 PORT INTERCONNECT_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_interconnect
 PARAMETER INSTANCE = axi4_0
 PARAMETER HW_VER = 1.02.a
 PORT interconnect_aclk = clk_100_0000MHzPLL0
 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
END

BEGIN axi_spi
 PARAMETER INSTANCE = SPI_FLASH
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40a00000
 PARAMETER C_HIGHADDR = 0x40a0ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT SPISEL = net_vcc
 PORT SCK = SPI_FLASH_SCLK
 PORT MOSI = SPI_FLASH_MOSI
 PORT MISO = SPI_FLASH_MISO
 PORT SS = SPI_FLASH_SS
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_uartlite
 PARAMETER INSTANCE = RS232_Uart_1
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_BAUDRATE = 9600
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_ODD_PARITY = 1
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40600000
 PARAMETER C_HIGHADDR = 0x4060ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT TX = RS232_Uart_1_sout
 PORT RX = RS232_Uart_1_sin
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_gpio
 PARAMETER INSTANCE = Push_Buttons_4Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40000000
 PARAMETER C_HIGHADDR = 0x4000ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT GPIO_IO_I = Push_Buttons_4Bits_TRI_I
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_gpio
 PARAMETER INSTANCE = LEDs_4Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40020000
 PARAMETER C_HIGHADDR = 0x4002ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT GPIO_IO_O = LEDs_4Bits_TRI_O
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_iic
 PARAMETER INSTANCE = IIC_EEPROM
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IIC_FREQ = 100000
 PARAMETER C_TEN_BIT_ADR = 0
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40800000
 PARAMETER C_HIGHADDR = 0x4080ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT Sda = IIC_EEPROM_SDA
 PORT Scl = IIC_EEPROM_SCL
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_gpio
 PARAMETER INSTANCE = GPIO_HDR
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40040000
 PARAMETER C_HIGHADDR = 0x4004ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT GPIO_IO_O = GPIO_HDR_TRI_O
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN axi_gpio
 PARAMETER INSTANCE = DIP_Switches_4Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
 PARAMETER C_BASEADDR = 0x40060000
 PARAMETER C_HIGHADDR = 0x4006ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT GPIO_IO_I = DIP_Switches_4Bits_TRI_I
 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
END

BEGIN npi_interface
 PARAMETER INSTANCE = npi_interface_0
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE XIL_NPI = npi_interface_0_XIL_NPI
 PORT clk = clk_100_0000MHzPLL0
 PORT rst = proc_sys_reset_0_MB_Reset
 PORT init_code = mytestlogic_0_init_code
 PORT Base_addr = mytestlogic_0_Base_addr
 PORT chip_npi_rnw = npi_interface_0_chip_npi_rnw
 PORT chip_npi_rdmodwr = npi_interface_0_chip_npi_rdmodwr
 PORT chip_npi_init = npi_interface_0_chip_npi_init
 PORT chip_npi_wrfifo_push = npi_interface_0_chip_npi_wrfifo_push
 PORT chip_npi_wrfifo_empty = npi_interface_0_chip_npi_wrfifo_empty
 PORT chip_npi_wrfifo_data = npi_interface_0_chip_npi_wrfifo_data
 PORT chip_npi_wrfifo_be = npi_interface_0_chip_npi_wrfifo_be
 PORT chip_npi_size = npi_interface_0_chip_npi_size
 PORT chip_npi_addr = npi_interface_0_chip_npi_addr
 PORT chip_npi_addrreq = npi_interface_0_chip_npi_addrreq
 PORT chip_npi_addrack = npi_interface_0_chip_npi_addrack
END

BEGIN chipscope_icon
 PARAMETER INSTANCE = chipscope_icon_0
 PARAMETER HW_VER = 1.05.a
 PARAMETER C_NUM_CONTROL_PORTS = 1
 PORT control0 = chipscope_ila_0_icon_control
END

BEGIN chipscope_ila
 PARAMETER INSTANCE = chipscope_ila_0
 PARAMETER HW_VER = 1.04.a
 PARAMETER C_TRIG0_UNITS = 1
 PARAMETER C_TRIG0_TRIGGER_IN_WIDTH = 79
 PARAMETER C_NUM_DATA_SAMPLES = 1024
 PORT chipscope_ila_control = chipscope_ila_0_icon_control
 PORT TRIG0 = npi_interface_0_chip_npi_addr & npi_interface_0_chip_npi_addrack & npi_interface_0_chip_npi_addrreq & npi_interface_0_chip_npi_init & npi_interface_0_chip_npi_rdmodwr & npi_interface_0_chip_npi_rnw & npi_interface_0_chip_npi_size & npi_interface_0_chip_npi_wrfifo_be & npi_interface_0_chip_npi_wrfifo_data & npi_interface_0_chip_npi_wrfifo_empty & npi_interface_0_chip_npi_wrfifo_push
 PORT CLK = clk_300_0000MHzPLL0_nobuf
END