UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

FIR滤波器中Each field of the tdata bus is zero padded to an 8-bit boundary怎么理解?

回复
Highlighted
Adventurer
发帖数: 64
注册日期: ‎11-13-2013

FIR滤波器中Each field of the tdata bus is zero padded to an 8-bit boundary怎么理解?

FIR Compiler v7.2,PG149 文档中介绍的Each field of the tdata bus is zero padded to an 8-bit boundary.应该如何理解呢?谢谢!

 

Each field of the tdata bus is zero padded to an 8-bit boundary.
Field A = Filter Select; size log2roundup(NUM_FILTS)
Field B = Channel pattern; log2roundup(NUM_PATTERNS).

新建位图图像.bmp

Moderator
发帖数: 276
注册日期: ‎08-02-2007

回复: FIR滤波器中Each field of the tdata bus is zero padded to an 8-bit boundary怎么理解?

有效数据放在地位(从LSB开始放), 高位补0.