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Xilinx Employee
Xilinx Employee
462 次查看
注册日期: ‎02-16-2012

standalone使用jtag打印,输出调试信息

对于MPSoC, 在BSP设置standalone的STDOUT/STDIN为 "psu_coresight_0" 。

对于Zynq, 在BSP设置standalone的STDOUT/STDIN为 "ps7_coresight_comp_0" 。

然后在XSCT里连接目标,再执行jtagterminal,jtagterminal的窗口里会出现打印字符。

注意,如果软件‘jtagterminal’没有被打开,又使用JTAG作为串口,也就是STDOUT/STDIN,打印一部分字符后,程序会暂停。

 

****** Xilinx Software Commandline Tool (XSCT) v2016.4
**** Build date : Dec 14 2016-22:58:10
** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.

xsct% help
Available Help Categories

connections - Target Connection Management
registers - Target Registers
running - Program Execution
memory - Target Memory
download - Target Download FPGA/BINARY
reset - Target Reset
breakpoints - Target Breakpoints/Watchpoints
streams - Jtag UART
miscellaneous - Miscellaneous
jtag - JTAG Access
tfile - Target File System
sdk - SDK Projects
petalinux - Petalinux commands
hsi - HSI commands

Type "help" followed by above "category" for more details or
help" followed by the keyword "commands" to list all the commands

xsct% help streams
Category commands

jtagterminal - Start/Stop Jtag based hyper-terminal
readjtaguart - Start/Stop reading from Jtag Uart

Type "help" followed by above "command", or the above "command" followed by
"-help" for more details

xsct% jtagterminal
Invalid target. Use "connect" command to connect to hw_server/TCF agent
xsct% connect
tcfchan#0
xsct% target
1 PS TAP
2 PMU
3 PL
4 PSU
5 RPU (Reset)
6 Cortex-R5 #0 (RPU Reset)
7 Cortex-R5 #1 (RPU Reset)
8 APU
9 Cortex-A53 #0 (Running)
10 Cortex-A53 #1 (Power On Reset)
11 Cortex-A53 #2 (Power On Reset)
12 Cortex-A53 #3 (Power On Reset)
xsct% target 9
xsct% jtagterminal

 

MicroBlaze也有类似用法。请参照 https://forums.xilinx.com/t5/Embedded-Processor-System-Design/How-to-use-jtag-uart-to-display-message/m-p/680363#M16927

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ps7-jtag-terminal.png
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