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Observer zhaoyuhang
Observer
156 次查看
注册日期: ‎09-29-2019

ISE下修改ibert的example design

我现在使用的是ISE14.7版本,在生成ibert的IP核时,没有选择生成bit文件,我需要对example design进行修改,在example design里面添加一些程序,之后再生成bit文件,请问如何对example design进行修改??

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3 条回复3
Xilinx Employee
Xilinx Employee
152 次查看
注册日期: ‎06-02-2017

回复: ISE下修改ibert的example design

@zhaoyuhang 你好,

生成的example design应该直接有RTL代码的,可以直接进行修改

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Observer zhaoyuhang
Observer
145 次查看
注册日期: ‎09-29-2019

回复: ISE下修改ibert的example design

我修改了之后,translate一直在报错,捕获11.PNG捕获.PNG

捕获1.PNG
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Xilinx Employee
Xilinx Employee
67 次查看
注册日期: ‎08-26-2010

回复: ISE下修改ibert的example design

Hi @zhaoyuhang 

可能是有的连线问题,可以讲ibert_example直接做顶层,可能修改更方便。

Thanks
Simon
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