UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor mrh973
Visitor
121 Views
Registered: ‎02-06-2019

AXI IIC slave over GPIO pins design

Jump to solution

I have made a Vivado design where I want to be able to use my custom Kintex-7 FPGA board as a slave on a i2c bus where external communication is via two on-board GPIO pins. How should I configure AXI IIC so that it uses specific GPIO pins for SDA & SDL? Further, I want to be able to use the Xilinx embeddedsw slave example as my code in the Vivado SDK once I get the design working, is this reccommended for my approach?

Screenshot from 2019-02-07 19-36-00.png

 

 

Tags (4)
0 Kudos
1 Solution

Accepted Solutions
Xilinx Employee
Xilinx Employee
88 Views
Registered: ‎11-22-2016

Re: AXI IIC slave over GPIO pins design

Jump to solution

You are on the correct path. On the block diagram you need to make the IIC pins external. You can do this by selecting the IIC+ pin, right-clicking and selecting make external. Create a wrapper file for the block diagram, then make the IO standard and pin assignments for all your IO. This can be done in a number of ways. One way is to synthesize, open the synthesized design, then assign the IO pins and standards through the IO planning view. You can then implement the design and export the hardware. 

To import th example code you r are describing, create a BSP for the SDK design. Then in the system.mss tab click on Import Examples next to axi_iic, select the software example you want.

 

2 Replies
Xilinx Employee
Xilinx Employee
89 Views
Registered: ‎11-22-2016

Re: AXI IIC slave over GPIO pins design

Jump to solution

You are on the correct path. On the block diagram you need to make the IIC pins external. You can do this by selecting the IIC+ pin, right-clicking and selecting make external. Create a wrapper file for the block diagram, then make the IO standard and pin assignments for all your IO. This can be done in a number of ways. One way is to synthesize, open the synthesized design, then assign the IO pins and standards through the IO planning view. You can then implement the design and export the hardware. 

To import th example code you r are describing, create a BSP for the SDK design. Then in the system.mss tab click on Import Examples next to axi_iic, select the software example you want.

 

Voyager
Voyager
83 Views
Registered: ‎02-01-2013

Re: AXI IIC slave over GPIO pins design

Jump to solution

 

I assume the rest of your design has been configured and built already, and you're simply added the I2C. 

Hopefully, the FPGA pins connected to the onboard GPIO pins are in a HR bank.

  • Connect the IIC interface to a top-level port.(Select the IP pin, then press <CTRL+T>.)
  • Make sure the IIC IP has been mapped to the MB address space.
  • Save the Block Diagram.
  • Create/update the top-level wrapper, if Vivado isn't already doing it.
  • Synthesize the design.
  • Open the Synthesized design. Select Layout -> I/O Planning from the top menu, if needed.
  • Find the new I2C signals in the I/O Ports tab in the bottom of the window.
  • Assign the signals to FPGA Package Pins (that are connected to your onboard GPIO pins) and select an appropriate I/O Std.
  • Save, close, and then finish the Implementation.

The I/O Std should be something like LVCMOS25 or LVCMOS33 and will be determined by voltage being used to pull-up the I2C lines. 

-Joe G.

 

 

 

0 Kudos