07-17-2017 12:24 AM
If I use the attribute DIFF_TERM = TRUE into LVDS standard input in a HR bank not powered at 2.5V or in HP bank not powered at 1.8V what exactly happens?
The LVDS input in those conditions is supported if DIFF_TRUE = FALSE but if I put DIFF_TERM = TRUE the differential termination is not guarantee precisely at 100 ohm (as the correct case) or can I cause a damage for the FPGA?
And if I not cause a damage for the FPGA how much is the differential resistor value for the HR and HP banks if not powered precisely at 2.5V and 1.8V respectively?
07-17-2017 02:00 AM
thaks for the answer; so from this sentence.
"VCCO supply other than 2.5V results in a non-ideal termination, and is not recommended or supported."
I have understand that the termination is not exactly 100 ohm for this reason is not ideal and not recommended but it is something similar and, if I do this, I have a not ideal termination (bigger or smaller 100 ohm) and I do not cause any damage at the FPGA.
Is it correct?