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Visitor cpdutrow
Visitor
345 Views
Registered: ‎07-24-2018

Z7010 thermal limits

Hello,

 

My company is planning on using the PicoZed with the Z7010 (Industrial grade) in an end product, which will be in an IP67 enclosure. We expect that it will be possible for the Zynq device to reach approx 105C. What are the thoughts on device performance at this temperature? Will the device fail? or will there be a significant loss in performance? We aren't doing anything particularly high speed. The Zynq will run at it's defined speed, and the PL side will be running on 100MHz. If the worst is a loss in speed, that may be something that we can live with, but device failure is a concern. Thank you. 

 

Best regards,

Chris

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2 Replies
Moderator
Moderator
337 Views
Registered: ‎04-18-2011

Re: Z7010 thermal limits

Hi @cpdutrow

 

absolute max Tj is 125C so stressing it at this kind of temperature is going to risk damage to it. 

Operating a commercial grade device beyond 85C there is a very high probability that you are going to see functional issues. 

The Vivado timing engine uses the worst case corners so any marginal timing paths will probably not work if you are outside the temperature range. It doesn't matter if you are 100Mhz or 1GHz, a timing path that is marginal can still fail if it is outside the operating range. 

Also remember that slowing down the clock won't fix a hold time issue. 

 

Keith 

 

 

 

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Moderator
Moderator
318 Views
Registered: ‎09-18-2014

Re: Z7010 thermal limits

Cpdutrow,

 

We expect that it will be possible for the Zynq device to reach approx 105C. 

I assume you are talking about the device junction temperature here and not the environmental or ambient temperature. This would be good distinction to confirm as with ambient temps of 105 junction temps could very well be arround 125degC even with a heat-sink. Anyways moving on with the assumption of it being junction temp Tj, recommended max for for commercial Zynq is 85degC and absolute max for almost all of our newer parts are 125degC with the exception of the largest VUP devices. Any thing above recommended max but below absolute max is deemed safe for device quality however that is not the same for device functionality. The data sheet specifications which the tools use are only rated up to the recommended max. As noted by Keith above your timing delays are not guaranteed at those temps between recommended and absolute max. You could* try derating timing but you would be venturing into it on your own as Xilinx will not officially support it. Also usually derating equations assume a linear clock to data relationship which may not always be the case...

 

https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/How-to-Extend-the-Operating-Temperature-of-FPGAs/ba-p/695723

since you are using the picozed board it may not be as useful but it's still a good read on the topic. 

 

UG116 - Our device reliability report guide has temperature stress test data(HTOL) and other environmental stress tests that may be interesting to you as well. 

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