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Visitor
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Registered: ‎06-23-2020

Appreciate your support! Fail to enable secure boot for ZCU104 Eval Board. Please help.

Dear All,

Trying to follow "ug1209-embedded-design-tutorial.pdf" to enable secure boot for ZCU104 Eval board step by step. Couldn't get encrypted and signed firmware loading working.

Not touching any eFuse and using BBRAM key/secure Header for FW decryption,  use "bh_auth_enable" for FW verification.

Also tried to import xilsecure 4.2 library's rsa and aes example to unit test zynqmp's CSU AES-GCM and RSA engine from PS-A53.  Failed badly.

However, from serial terminal I did see FSBL bootloader's entry message in all my experiments.  Which means to me that CSU bootram was able to authN/decrypt then execute FSBL in PS A53. 

More details for my test cases:

1> Test cases integrating all secure booting features in one BIF.  Failed for sure.

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[pskfile]psk0.pem
[sskfile]ssk0.pem
[auth_params]spk_id = 0; ppk_select = 0
[keysrc_encryption]bbram_red_key
[fsbl_config]a53_x64, bh_auth_enable, opt_key
[bootloader, destination_cpu = a53-0, authentication = rsa, encryption = aes, aeskeyfile =
fsbl_a53.nky, blocks = 1728(*)]/home/leizhou/workspace/petalinux_project/temp/zcu104-petalinux/images/linux/zynqmp_fsbl.elf
[destination_cpu = pmu, authentication = rsa, encryption = aes, aeskeyfile =
pmufw.nky, blocks = 1728(*)]/home/leizhou/workspace/petalinux_project/temp/zcu104-petalinux/images/linux/pmufw.elf
[destination_cpu = a53-0, exception_level = el-3, trustzone, authentication = rsa]/home/leizhou/workspace/arm-trusted-firmware/build/zynqmp/debug/bl31/bl31.elf
[load = 0x04800000, destination_cpu = a53-0, authentication = rsa]/home/leizhou/workspace/petalinux_project/temp/zcu104-petalinux/images/linux/system.dtb
[destination_cpu = a53-0, exception_level = el-2, authentication = rsa]/home/leizhou/workspace/petalinux_project/temp/zcu104-petalinux/images/linux/u-boot.elf

2> Next tried to split into individual cases.   Test case 2:  Loading encrypted FSBL and encrypted "hello world" application as per UG1209.   Failed to decrypt/run "Hello World".

3> Test case 3:  Use libxilsecure 4.2's basic example to test CSU's AES-GCM engine.   Failed.

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[keysrc_encryption]bbram_red_key
[bootloader, encryption = aes, aeskeyfile = aes_fsbl.nky, destination_cpu = a53-0]/home/leizhou/workspace/vitis/zcu104-iso/zynqmp_fsbl/executable.elf
[destination_cpu = a53-0]/home/leizhou/workspace/vitis/xilsecure_simple_aes_example_1/Debug/xilsecure_simple_aes_example_1.elf
}

JTAG debugging details please refer to my last weeks' POST without any response yet. Common failure spot is dst_dma_channel transfer failure.

https://forums.xilinx.com/t5/Embedded-Linux/Fail-to-run-xilsecure-4-2-simple-aes-encrypt-decrypt-example-on/td-p/1143183

4> Same approach to tackle loading authN firmware failure.  Unit test case's BIF file as following:

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[bootloader, destination_cpu = a53-0]/home/leizhou/workspace/vitis/zcu104-iso/zynqmp_fsbl/executable.elf
[destination_cpu = a53-0]/home/leizhou/workspace/vitis/xilsecure_rsa_generic_example_1/Debug/xilsecure_rsa_generic_example_1.elf
}

Any hints are much appreciated!

Lei Zhou

=======================================================

9/1/2020 update:

1> Vivado/vitis/petalinux are all latest 2020 version.

2> In terms of BOOT.BIN RSA authentication failure,   further debugging session as per attached.   It failed within  XILSECURE_RSA_Operation(...) due to operation hardware RSA engine time-out(status register never returns READY) when FSBL tries to verify SPK as part of boot header validation process.

3> BIF file under test is as following:

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[pskfile]psk0.pem
[sskfile]ssk0.pem
[auth_params]spk_id = 0; ppk_select = 0
[fsbl_config]bh_auth_enable
[bootloader, destination_cpu = a53-0, authentication = rsa]/home/leizhou/workspace/vitis/zcu104-iso/zynqmp_fsbl/executable.elf
[destination_cpu = pmu]/home/leizhou/workspace/xilinx-zcu104-2020.1/images/linux/pmufw.elf
[destination_cpu = a53-0, exception_level = el-3, trustzone]/home/leizhou/workspace/xilinx-zcu104-2020.1/images/linux/bl31.elf
[load = 0x04800000, destination_cpu = a53-0]/home/leizhou/workspace/xilinx-zcu104-2020.1/images/linux/system.dtb
[destination_cpu = a53-0, exception_level = el-2]/home/leizhou/workspace/xilinx-zcu104-2020.1/images/linux/u-boot.elf
}

 

VirtualBox_linuxvm_01_09_2020_12_05_11.png
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Moderator
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Registered: ‎10-30-2017

Hi @lei_zhou ,

is the device working with the images with non secure boot flow? 

which version of tools you are using?

Best Regards,

Srikanth

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Registered: ‎06-23-2020

Thanks for getting back and help me getting this gating issue resolved.

Non secure booting image works very well from FSBL/BL31/PMUFW/uboot/image.ub.   Have been worked with ZCU104 and Vivado/Vitis/Petalinux 2020.1.0 tool sets with good user experience so far until hitting this major block bringing up secure boot/CSU hardware crypto.

Haven't made any modification to any BSP or xilsecure code yet and I guess I'm missing something very fundamental which is not documented somewhere clearly.

BTW, just out of curiosity,  do I need enable anything within Vivado IP integrator?    Right now, I'm fully following UG1209's guidance.

Much appreciated!

Lei

 

 

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Registered: ‎10-30-2017

Hi @lei_zhou ,

Nothing has to be done in Vivado. just check whether the BBRAM is programmed with the correct key file or not. Please re-program the bbram with encryption key again and send me the log. also, the key which is programmed in BBRAM must the same key used to encrypt the FSBL.

Also make sure that you are using following example to program the BBRAM: https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilskey/examples/xilskey_bbramps_zynqmp_example.c

after verifying the key file in BBRAM, please create a simple image (FSBL+helloworld) encrypted with the same key programmed in BBRAM to verify the secure boot.

if simple encrypted image works fine then start adding other images and verify it step by step.

 

Best Regards,

Srikanth 

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Visitor
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Registered: ‎06-23-2020

Thanks Savula for the response.

1> Yes,  Please refer to my un-answered POST https://forums.xilinx.com/t5/Embedded-Linux/Fail-to-run-xilsecure-4-2-simple-aes-encrypt-decrypt-example-on/td-p/1143183,  where I did exactly what you suggested and also test result/snapshot were shared.

2> Also as you pointed out,  I followed xapp1319 on how to program AES black key to BBRAM.  AES key was generated by BOOTGEN tools ---> aes_fsbl.nky, among which key 0 was programmed to BBRAM without any problem.   Same aes_fsbl.nky file was used to encrypt.

3> Attached please terminal logs I captured from three cases.   Please note:

      *  first section of logs captured when BBRAM was programmed suucessfully.

      * 2nd section of logs captured  when only fsbl was encrypted.

      *3rd section of logs captured when both fsbl and hello_world app are encrypted, in which case FSBL was successfully decryted/loaded by CSU bootrom and however hello world app failed to be decrypted by FSBL as per my JTAG debugging session.

       Nothing new for me and everything is consistently failing as what I have posted in previous POST.

 

 

VirtualBox_linuxvm_01_09_2020_16_57_11.png
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Visitor
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Registered: ‎06-23-2020

@savula,    any comments?   Thanks,  Lei.

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Registered: ‎10-30-2017

Hi @lei_zhou ,

I will test it once at my end and validate the process. I will provide you the complete steps and bif file soon.

Best Regards,
Srikanth
----------------------------------------------------------------------------------------------
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Registered: ‎06-23-2020

thanks @savula.  

BTW,  just make sure I'm using Eval Board (Z1-ZCU104 Rev 1.0   and platform Silicon 4.0).

Also does it have any such things as "CSU hardware crypto" disabled due to any export control policy?    Seems not since CSU BOOTROM could still successfully decrypt/authN FSBL from the BOOT.BIN and execute FSBL in A53-0.

But anyway, let's wait for your result!

  

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@savula,  any positive news to share?   Thanks,

 Lei 

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Hi @lei_zhou ,

 

I have successfully boot the device in secure mode using BBRAM and bh_auth with out any issue. below is the bif file I used to boot the device

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[pskfile] psk.pem
[sskfile] ssk.pem
[fsbl_config] bh_auth_enable
[auth_params] ppk_select=0; spk_id=0x00000000
[keysrc_encryption]bbram_red_key
[bootloader, destination_cpu = a53-0, authentication=rsa, encryption = aes,aeskeyfile = aes_fsbl.nky]C:\Users\zynqmp\bbram\fsbl\Debug\fsbl.elf
[destination_cpu = a53-0, authentication=rsa, encryption = aes, aeskeyfile = aes_hello.nky]C:\Users\zynqmp\bbram\hello\Debug\hello.elf
}

Bootgen command to generate the BOOT.bin:   bootgen -arch zynqmp -image auth_enc_boot.bif -p XCZU9EG -w -o BOOT.bin

 

boot log:

Xilinx Zynq MP First Stage Boot Loader
Release 2019.2 Sep 3 2020 - 13:01:56
Reset Mode : System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU7EV
FMC VADJ Configuration Successful
Board Configuration successful
Processor Initialization Done
================= In Stage 2 ============
SD1 with level shifter Boot Mode
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
Authentication Enabled
XFsbl_SpkVer: Ppk Mod FFFE13E0, Ppk Mod Ex FFFE15E0, Ppk Exp 1000100
Ppk Modular START
BF D4 8B 4E F9 81 87 2A 72 E6 A7 2C EF 1B B6 8F
C6 75 CF 18 9F 48 13 80 C6 B4 E3 54 9E 61 2C 91
6D D0 6F D9 37 65 3B 6E 58 3C 8E 02 A5 82 E9 06
70 68 68 0A 10 DD A3 43 CF B4 F7 4D 0E 7F DB 17
E3 CD AE 23 C0 D9 DE 4B 1C 58 BA 76 3A 3B 06 F7
AC 2E 73 54 A6 42 13 4C F5 CF 7D 6C 43 87 71 7A
42 1C C6 75 77 CC BE A3 4C 39 B9 56 29 A4 84 6D
B0 B3 0A 00 C6 CF 4F 4B AF 2A CD A6 7F 70 3D 4E
E7 A2 15 86 20 65 BD 47 37 3F 35 C7 D6 2B C7 16
1C 7E DD F1 C3 F0 2D 97 65 6B 9B 9F C8 93 D2 22
D9 F2 17 2D F7 D8 47 AA 62 8D 40 7D 77 A0 EA 2C
E1 A2 9C 7D 38 3E AF E9 DE C2 CD 72 72 92 10 68
A4 EB 8C 3C E1 F5 F4 D2 12 8E B7 2E 76 BE 1B B7
93 FC 9E 28 FB EC 8B 5F 5D 94 2D 2F 7D 98 36 07
B7 BE 46 76 AD 22 B1 1F B1 94 27 CA 0E 63 CF C0
8A E2 2B 04 AC 13 09 38 A0 C4 C8 8F 5F 8E 89 48
E7 E7 80 AB DD 79 FD A9 67 C4 FB B0 58 FB 11 2A
CA FF 40 7D 60 0D DD 7B F4 F0 E2 07 5C 23 A9 A4
EE 13 41 40 2C A9 F9 E4 A4 23 AE DE C3 12 A7 6A
38 DC 13 C5 76 E8 8A BB C1 35 C3 E7 80 7E A1 D4
9C F0 D0 4A 7F 09 3C F8 27 1C F5 63 33 AA D7 B6
CA BD 00 01 47 D1 E8 6E 79 6E DD BF 85 FB 7F 16
A9 61 AA BD 55 BE AE 94 C6 9F 18 55 69 49 C9 43
E5 8F FF 36 8A 0B 1A A9 4F 67 B5 1D 7D 1E 33 72
DF E8 42 ED 0F 4E 99 D4 7E 63 0D 5E C8 A7 7A A5
18 4B DE 45 E9 B0 D0 63 BC 13 D9 F3 16 2A 3E 98
9A 13 08 66 3C 5D 2B F0 FE 1A ED 68 00 DE ED BF
9C 09 F2 56 5F 97 86 28 E7 43 40 87 D0 F2 65 51
1A 71 FB CB 54 2F 2B 42 4A 44 11 7E 50 82 36 89
79 F6 E4 CD 4D 6F 6A 33 26 E8 23 BB CC F2 96 16
16 80 89 A3 63 3E 54 8F A9 36 30 16 59 ED E4 C7
7D EA 17 AC F8 31 46 F8 D7 CB 1F 71 B3 99 A4 7D

Ppk Modular END
Ppk ModularEx START
BE BE 5D 25 19 F6 A5 07 06 54 AC 41 3D E4 42 FE
D3 4A F2 4A 23 35 2F 5C 70 2E 5A 8C D8 3D FA 8F
EB 21 21 56 49 F7 53 C2 CE B8 D2 FD 5F C3 8F 0E
01 4F 5F 1D 7B 35 BF C6 CE BD 98 7E 15 CF CF 3C
FB FF 5F 75 C0 E3 B7 E9 6A F5 4E C6 29 3E 02 1D
B6 5F 7C 66 70 CE 7F 74 E9 8B 20 BB F9 0F C2 0C
11 B3 F2 E3 2B 58 05 0C 20 4F 0D DB 23 F2 4B 79
7C 0E 41 23 20 EC DA 1A 6E F8 A2 98 0E A6 D7 D4
65 D3 CE 2A B4 F7 62 D5 40 8D 43 2E 9F FC 24 63
1D 80 4B 2A AC C3 D1 F4 CA 83 0B 33 D7 36 72 97
2B 2A 7A 92 DE EF 9E 6F 15 66 8B 15 D3 89 1B 2D
1C 20 93 78 2F B3 9C 9E A7 CA A0 9F D9 66 A3 13
1D B9 30 8B 63 36 2F 5C 90 FB EC 7C 7B 8B 7E 4A
C4 25 85 67 45 4D 0B F7 26 26 73 2A D8 2F AF C7
97 57 03 0A B5 30 B3 2F 3E C9 11 86 ED 16 9D 2B
91 30 1E 5E 8F 27 15 A4 99 B6 18 CC 59 DB C9 08
3F A9 55 5E 5E CE 5B AD FB 7D 08 04 62 DC A9 88
96 FB DC 15 F6 31 F2 8C EB 0E 9E C6 10 C9 BF 6D
BE 62 42 4F DD 13 4E C9 7C 07 F9 B2 65 33 0A 0B
4C 51 D7 10 48 6A 07 9E 70 2A D5 2C 57 E9 4B 91
50 20 F7 40 7E 8B C7 7C D5 5A E8 B7 41 6D B3 DB
CE B4 6E 98 49 85 EB 38 A2 5B 4A 47 6E 4F C5 19
60 66 88 1E 1B 34 F7 C8 47 0C 24 6F 16 AF A3 A8
90 0A 9A F2 2F E3 14 DB 1E A7 38 6B F5 59 76 6B
CB D8 9A 41 27 B0 8C 9B EF E5 0E 0E 89 FF 4B 2F
3A E4 DA E4 65 D8 DB 4A 26 23 0C BA 1E 2A 9D A2
6E E5 02 AF 46 E0 78 28 E8 61 78 CB E4 86 B3 F7
41 5C 8C 0E DD 7F 18 3C 21 DC 33 92 1F AA 72 28
59 AB AD 5D 2D 28 EE 68 A2 F9 2C A1 71 F0 5C F3
33 77 52 5A 60 FF 01 A5 8B C9 81 E6 17 1A E7 6D
C6 EB 75 A3 98 60 07 92 66 BB AD 8F 40 FE 39 C8
55 2A 78 30 E1 26 A2 06 86 90 B6 11 09 24 83 99

Ppk ModularEx END
Ppk Exp = 1000100
XFsbl_BhAuthentication: Spk Mod FFFE1CE0, Spk Mod Ex FFFE1EE0, Spk Exp 1000100
Spk Modular START
BB 62 99 8D FC A5 3F AB DE 1A 83 A1 89 0E 81 0A
78 03 D8 F8 F8 FA EB 00 54 27 B5 9B 08 E6 F9 61
3A A8 B9 D6 E8 63 E7 F3 9E CE C9 F3 95 0B D3 14
9D DB 24 18 B0 66 FE A0 97 FC F5 21 25 5D 82 0B
96 2C 80 C9 E2 3B B5 93 24 21 73 EE AB 2B 3C B8
E7 B0 34 2A 04 1A AD 7C F3 6C DB EB EE 80 48 4A
BC 72 5B F1 25 89 54 C6 41 89 67 AA A8 F7 ED 11
0E 1F 2D 77 AF A4 9E 40 40 E4 A0 08 94 65 22 E1
89 9F AA A1 21 B4 B5 D9 4B 23 9F CD 47 EC 41 26
D2 68 41 37 14 80 34 43 5F 0E 5E 54 45 78 14 C0
DF 5A A8 AF 9A 43 5F 98 59 1D 9B AE 6F 24 87 B9
36 4B BF 45 EF 54 BD 91 F5 B5 B3 7E 95 52 DE 1D
9F 9D D1 0D CA A9 DA 67 68 E0 B8 FF 99 57 C6 03
34 56 F3 F3 A1 CF FA 34 E6 CA 73 78 AA 43 91 BB
16 50 DC 1C 76 2C 73 52 5F 33 00 04 EF 40 94 5D
F9 87 8A 64 55 2B 72 A1 23 11 FA 55 BB DC 49 39
E6 23 14 80 BE 59 47 7C 86 D0 8B 29 D4 8C 2E F0
BE D4 EA 22 88 CD FD 1A 6E 2E C8 9A 1D C6 47 6D
F3 45 EB 72 33 00 FB D0 F7 E1 9A 54 26 93 00 E0
20 F4 EB 5A 35 80 65 5D AD 03 18 65 0A 94 BB AA
FB 5F F7 04 AC 6C 86 A8 4A DD 70 11 C2 D2 23 7B
5D 61 59 AC 51 55 20 92 2C 97 3E 9C 68 36 F7 79
DA EF 75 95 92 5D 2B 7C 0B 76 DE 0F 39 B2 E6 93
B9 96 86 61 2F 78 B9 B7 80 20 8E 14 2A 52 1F ED
0E E0 E5 7C 37 FB 65 57 B1 57 E6 3D FE 9F D8 09
D0 A9 BC 3E E0 34 8C 02 5A 4B 7C EC E5 CC 8F 1C
C5 8B AD A8 0E 0A 43 12 3E A7 17 22 2F 2C 19 D9
07 0E 78 FB 5A 38 A0 6D C6 7A B5 DB 36 0D 28 60
19 6E F9 85 D6 12 9C CD 93 F5 EF 03 6F 51 88 96
22 A0 32 8E 8C 13 4A B7 4C 42 DA B3 94 42 4D DE
CE DD 99 8F AC B8 9F E3 CA 6E 55 36 A1 85 37 75
31 F5 FD E9 25 92 7D FE 3A 50 22 8E 5E DF 2D DF

Spk Modular END
Spk ModularEx START
81 77 6D 31 AD 39 1A 09 B3 A7 6D 26 AA 34 12 C4
41 15 B5 49 8F C4 33 CA F1 DB F8 70 0C 5C 50 48
F9 83 B7 AC 8B 0D DB 19 B3 AD D7 86 E1 F1 45 D2
0D CB 87 51 FB E8 98 AF 73 69 02 4C E4 FD D5 C3
0D D2 53 FB E7 51 D1 CF 42 53 AC 5D C4 01 05 61
7B 69 49 35 3B EF D1 F5 9F 95 AD 09 DF 80 AA B3
3E E9 88 50 6C E5 A7 28 23 42 81 10 13 3B D8 5E
E0 B6 A1 76 07 A3 94 C7 7D 70 63 0E 6E DF 85 1A
6F 2D 44 9D 92 8E A8 52 66 7A FA B1 20 B1 CF CC
AF 4E CA 7C E0 BA AC 59 7E 24 B0 5B 3D B3 FF C6
69 2F BB B9 70 F7 18 26 E9 E0 78 F6 4C 3B 7D 79
AC 59 86 A1 1C 1E 59 EF AE 69 79 67 6E 79 96 74
C9 0C 41 4C 6E 5E 47 D8 F3 43 9D E3 D7 E4 A9 40
3E 7B 82 DD F3 FB 62 70 58 B2 C1 16 33 00 F7 7D
07 92 8C 91 ED BD FE E9 5B E6 42 1D 5B 26 79 66
40 B5 4C 07 11 80 3F 12 2E 52 13 5A F4 61 A5 A3
F0 4B 62 9D E6 33 33 A7 C1 00 D5 82 E1 B5 04 3D
D5 AB 11 AF E8 86 57 DA 24 82 91 25 FE 76 4F E4
70 C2 5B FB 51 C9 29 4D 90 27 F8 55 8E 33 4D FE
42 B7 D8 8A 20 81 B3 35 5F 58 D6 48 8A 2F CA F9
87 D1 DE 47 54 F8 0C 1B 54 4B 71 7E DD 43 2B 39
E1 7B F9 70 4F 76 1E 3E F9 D6 A6 09 31 6D 93 60
E8 24 4C 4A 60 B0 51 05 8D 3E F5 13 42 3C 77 5B
EA D4 88 05 AD 10 10 5B B8 24 6D 89 51 21 F0 30
31 2C AF 54 10 7B 1E D0 27 43 6E 82 B5 82 53 B8
07 EC E9 DF 1F 8D 75 DB 26 5F 1C 29 32 83 AC 28
A6 57 F1 C1 95 F1 31 F0 1E 75 BC 90 8A 30 FB F4
1B 73 E4 B7 81 F1 5C 99 40 FA A6 26 0C F3 ED 47
7A 7C ED 0C 72 51 68 05 DF 8D C4 5F 52 3F FD 98
F4 40 03 B5 4D 84 22 82 9E 14 E4 6A 80 5C 8F 20
B0 30 24 16 8D 8D 68 0D 42 91 0D 1A CD 83 2D 0D
18 DD 4E 27 2A 1E 0D FC 40 84 ED 4E 0C 9A F8 18

Spk ModularEx END
Spk Exp = 1000100
Auth: Partition Offset FFFF1C40, PartitionLen 1F40, AcOffset FFFE1860, HashLen 3 0
XFsbl_SpkVer: Ppk Mod FFFE13E0, Ppk Mod Ex FFFE15E0, Ppk Exp 1000100
Ppk Modular START
BF D4 8B 4E F9 81 87 2A 72 E6 A7 2C EF 1B B6 8F
C6 75 CF 18 9F 48 13 80 C6 B4 E3 54 9E 61 2C 91
6D D0 6F D9 37 65 3B 6E 58 3C 8E 02 A5 82 E9 06
70 68 68 0A 10 DD A3 43 CF B4 F7 4D 0E 7F DB 17
E3 CD AE 23 C0 D9 DE 4B 1C 58 BA 76 3A 3B 06 F7
AC 2E 73 54 A6 42 13 4C F5 CF 7D 6C 43 87 71 7A
42 1C C6 75 77 CC BE A3 4C 39 B9 56 29 A4 84 6D
B0 B3 0A 00 C6 CF 4F 4B AF 2A CD A6 7F 70 3D 4E
E7 A2 15 86 20 65 BD 47 37 3F 35 C7 D6 2B C7 16
1C 7E DD F1 C3 F0 2D 97 65 6B 9B 9F C8 93 D2 22
D9 F2 17 2D F7 D8 47 AA 62 8D 40 7D 77 A0 EA 2C
E1 A2 9C 7D 38 3E AF E9 DE C2 CD 72 72 92 10 68
A4 EB 8C 3C E1 F5 F4 D2 12 8E B7 2E 76 BE 1B B7
93 FC 9E 28 FB EC 8B 5F 5D 94 2D 2F 7D 98 36 07
B7 BE 46 76 AD 22 B1 1F B1 94 27 CA 0E 63 CF C0
8A E2 2B 04 AC 13 09 38 A0 C4 C8 8F 5F 8E 89 48
E7 E7 80 AB DD 79 FD A9 67 C4 FB B0 58 FB 11 2A
CA FF 40 7D 60 0D DD 7B F4 F0 E2 07 5C 23 A9 A4
EE 13 41 40 2C A9 F9 E4 A4 23 AE DE C3 12 A7 6A
38 DC 13 C5 76 E8 8A BB C1 35 C3 E7 80 7E A1 D4
9C F0 D0 4A 7F 09 3C F8 27 1C F5 63 33 AA D7 B6
CA BD 00 01 47 D1 E8 6E 79 6E DD BF 85 FB 7F 16
A9 61 AA BD 55 BE AE 94 C6 9F 18 55 69 49 C9 43
E5 8F FF 36 8A 0B 1A A9 4F 67 B5 1D 7D 1E 33 72
DF E8 42 ED 0F 4E 99 D4 7E 63 0D 5E C8 A7 7A A5
18 4B DE 45 E9 B0 D0 63 BC 13 D9 F3 16 2A 3E 98
9A 13 08 66 3C 5D 2B F0 FE 1A ED 68 00 DE ED BF
9C 09 F2 56 5F 97 86 28 E7 43 40 87 D0 F2 65 51
1A 71 FB CB 54 2F 2B 42 4A 44 11 7E 50 82 36 89
79 F6 E4 CD 4D 6F 6A 33 26 E8 23 BB CC F2 96 16
16 80 89 A3 63 3E 54 8F A9 36 30 16 59 ED E4 C7
7D EA 17 AC F8 31 46 F8 D7 CB 1F 71 B3 99 A4 7D

Ppk Modular END
Ppk ModularEx START
BE BE 5D 25 19 F6 A5 07 06 54 AC 41 3D E4 42 FE
D3 4A F2 4A 23 35 2F 5C 70 2E 5A 8C D8 3D FA 8F
EB 21 21 56 49 F7 53 C2 CE B8 D2 FD 5F C3 8F 0E
01 4F 5F 1D 7B 35 BF C6 CE BD 98 7E 15 CF CF 3C
FB FF 5F 75 C0 E3 B7 E9 6A F5 4E C6 29 3E 02 1D
B6 5F 7C 66 70 CE 7F 74 E9 8B 20 BB F9 0F C2 0C
11 B3 F2 E3 2B 58 05 0C 20 4F 0D DB 23 F2 4B 79
7C 0E 41 23 20 EC DA 1A 6E F8 A2 98 0E A6 D7 D4
65 D3 CE 2A B4 F7 62 D5 40 8D 43 2E 9F FC 24 63
1D 80 4B 2A AC C3 D1 F4 CA 83 0B 33 D7 36 72 97
2B 2A 7A 92 DE EF 9E 6F 15 66 8B 15 D3 89 1B 2D
1C 20 93 78 2F B3 9C 9E A7 CA A0 9F D9 66 A3 13
1D B9 30 8B 63 36 2F 5C 90 FB EC 7C 7B 8B 7E 4A
C4 25 85 67 45 4D 0B F7 26 26 73 2A D8 2F AF C7
97 57 03 0A B5 30 B3 2F 3E C9 11 86 ED 16 9D 2B
91 30 1E 5E 8F 27 15 A4 99 B6 18 CC 59 DB C9 08
3F A9 55 5E 5E CE 5B AD FB 7D 08 04 62 DC A9 88
96 FB DC 15 F6 31 F2 8C EB 0E 9E C6 10 C9 BF 6D
BE 62 42 4F DD 13 4E C9 7C 07 F9 B2 65 33 0A 0B
4C 51 D7 10 48 6A 07 9E 70 2A D5 2C 57 E9 4B 91
50 20 F7 40 7E 8B C7 7C D5 5A E8 B7 41 6D B3 DB
CE B4 6E 98 49 85 EB 38 A2 5B 4A 47 6E 4F C5 19
60 66 88 1E 1B 34 F7 C8 47 0C 24 6F 16 AF A3 A8
90 0A 9A F2 2F E3 14 DB 1E A7 38 6B F5 59 76 6B
CB D8 9A 41 27 B0 8C 9B EF E5 0E 0E 89 FF 4B 2F
3A E4 DA E4 65 D8 DB 4A 26 23 0C BA 1E 2A 9D A2
6E E5 02 AF 46 E0 78 28 E8 61 78 CB E4 86 B3 F7
41 5C 8C 0E DD 7F 18 3C 21 DC 33 92 1F AA 72 28
59 AB AD 5D 2D 28 EE 68 A2 F9 2C A1 71 F0 5C F3
33 77 52 5A 60 FF 01 A5 8B C9 81 E6 17 1A E7 6D
C6 EB 75 A3 98 60 07 92 66 BB AD 8F 40 FE 39 C8
55 2A 78 30 E1 26 A2 06 86 90 B6 11 09 24 83 99

Ppk ModularEx END
Ppk Exp = 1000100
Doing Partition Sign verification
XFsbl_PartVer: Spk Mod FFFE1CE0, Spk Mod Ex FFFE1EE0, Spk Exp 1000100
Spk Modular START
BB 62 99 8D FC A5 3F AB DE 1A 83 A1 89 0E 81 0A
78 03 D8 F8 F8 FA EB 00 54 27 B5 9B 08 E6 F9 61
3A A8 B9 D6 E8 63 E7 F3 9E CE C9 F3 95 0B D3 14
9D DB 24 18 B0 66 FE A0 97 FC F5 21 25 5D 82 0B
96 2C 80 C9 E2 3B B5 93 24 21 73 EE AB 2B 3C B8
E7 B0 34 2A 04 1A AD 7C F3 6C DB EB EE 80 48 4A
BC 72 5B F1 25 89 54 C6 41 89 67 AA A8 F7 ED 11
0E 1F 2D 77 AF A4 9E 40 40 E4 A0 08 94 65 22 E1
89 9F AA A1 21 B4 B5 D9 4B 23 9F CD 47 EC 41 26
D2 68 41 37 14 80 34 43 5F 0E 5E 54 45 78 14 C0
DF 5A A8 AF 9A 43 5F 98 59 1D 9B AE 6F 24 87 B9
36 4B BF 45 EF 54 BD 91 F5 B5 B3 7E 95 52 DE 1D
9F 9D D1 0D CA A9 DA 67 68 E0 B8 FF 99 57 C6 03
34 56 F3 F3 A1 CF FA 34 E6 CA 73 78 AA 43 91 BB
16 50 DC 1C 76 2C 73 52 5F 33 00 04 EF 40 94 5D
F9 87 8A 64 55 2B 72 A1 23 11 FA 55 BB DC 49 39
E6 23 14 80 BE 59 47 7C 86 D0 8B 29 D4 8C 2E F0
BE D4 EA 22 88 CD FD 1A 6E 2E C8 9A 1D C6 47 6D
F3 45 EB 72 33 00 FB D0 F7 E1 9A 54 26 93 00 E0
20 F4 EB 5A 35 80 65 5D AD 03 18 65 0A 94 BB AA
FB 5F F7 04 AC 6C 86 A8 4A DD 70 11 C2 D2 23 7B
5D 61 59 AC 51 55 20 92 2C 97 3E 9C 68 36 F7 79
DA EF 75 95 92 5D 2B 7C 0B 76 DE 0F 39 B2 E6 93
B9 96 86 61 2F 78 B9 B7 80 20 8E 14 2A 52 1F ED
0E E0 E5 7C 37 FB 65 57 B1 57 E6 3D FE 9F D8 09
D0 A9 BC 3E E0 34 8C 02 5A 4B 7C EC E5 CC 8F 1C
C5 8B AD A8 0E 0A 43 12 3E A7 17 22 2F 2C 19 D9
07 0E 78 FB 5A 38 A0 6D C6 7A B5 DB 36 0D 28 60
19 6E F9 85 D6 12 9C CD 93 F5 EF 03 6F 51 88 96
22 A0 32 8E 8C 13 4A B7 4C 42 DA B3 94 42 4D DE
CE DD 99 8F AC B8 9F E3 CA 6E 55 36 A1 85 37 75
31 F5 FD E9 25 92 7D FE 3A 50 22 8E 5E DF 2D DF

Spk Modular END
Spk ModularEx START
81 77 6D 31 AD 39 1A 09 B3 A7 6D 26 AA 34 12 C4
41 15 B5 49 8F C4 33 CA F1 DB F8 70 0C 5C 50 48
F9 83 B7 AC 8B 0D DB 19 B3 AD D7 86 E1 F1 45 D2
0D CB 87 51 FB E8 98 AF 73 69 02 4C E4 FD D5 C3
0D D2 53 FB E7 51 D1 CF 42 53 AC 5D C4 01 05 61
7B 69 49 35 3B EF D1 F5 9F 95 AD 09 DF 80 AA B3
3E E9 88 50 6C E5 A7 28 23 42 81 10 13 3B D8 5E
E0 B6 A1 76 07 A3 94 C7 7D 70 63 0E 6E DF 85 1A
6F 2D 44 9D 92 8E A8 52 66 7A FA B1 20 B1 CF CC
AF 4E CA 7C E0 BA AC 59 7E 24 B0 5B 3D B3 FF C6
69 2F BB B9 70 F7 18 26 E9 E0 78 F6 4C 3B 7D 79
AC 59 86 A1 1C 1E 59 EF AE 69 79 67 6E 79 96 74
C9 0C 41 4C 6E 5E 47 D8 F3 43 9D E3 D7 E4 A9 40
3E 7B 82 DD F3 FB 62 70 58 B2 C1 16 33 00 F7 7D
07 92 8C 91 ED BD FE E9 5B E6 42 1D 5B 26 79 66
40 B5 4C 07 11 80 3F 12 2E 52 13 5A F4 61 A5 A3
F0 4B 62 9D E6 33 33 A7 C1 00 D5 82 E1 B5 04 3D
D5 AB 11 AF E8 86 57 DA 24 82 91 25 FE 76 4F E4
70 C2 5B FB 51 C9 29 4D 90 27 F8 55 8E 33 4D FE
42 B7 D8 8A 20 81 B3 35 5F 58 D6 48 8A 2F CA F9
87 D1 DE 47 54 F8 0C 1B 54 4B 71 7E DD 43 2B 39
E1 7B F9 70 4F 76 1E 3E F9 D6 A6 09 31 6D 93 60
E8 24 4C 4A 60 B0 51 05 8D 3E F5 13 42 3C 77 5B
EA D4 88 05 AD 10 10 5B B8 24 6D 89 51 21 F0 30
31 2C AF 54 10 7B 1E D0 27 43 6E 82 B5 82 53 B8
07 EC E9 DF 1F 8D 75 DB 26 5F 1C 29 32 83 AC 28
A6 57 F1 C1 95 F1 31 F0 1E 75 BC 90 8A 30 FB F4
1B 73 E4 B7 81 F1 5C 99 40 FA A6 26 0C F3 ED 47
7A 7C ED 0C 72 51 68 05 DF 8D C4 5F 52 3F FD 98
F4 40 03 B5 4D 84 22 82 9E 14 E4 6A 80 5C 8F 20
B0 30 24 16 8D 8D 68 0D 42 91 0D 1A CD 83 2D 0D
18 DD 4E 27 2A 1E 0D FC 40 84 ED 4E 0C 9A F8 18

Spk ModularEx END
Spk Exp 1000100
Partition Verification done
*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x2
Partition Header Address: 0x440
Partition Present Device: 0x0
Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x2412
Data word offset: 0x2432
Total Data word length: 0x27F0
Destination Load Address: 0x0
Execution Address: 0x0
Data word offset: 0x8ED0
Partition Attributes: 0x8196
Aes initialized
Authentication Enabled
Auth: Partition Offset 0, PartitionLen 9FC0, AcOffset FFFE1860, HashLen 30
XFsbl_SpkVer: Ppk Mod FFFE13E0, Ppk Mod Ex FFFE15E0, Ppk Exp 1000100
Ppk Modular START
BF D4 8B 4E F9 81 87 2A 72 E6 A7 2C EF 1B B6 8F
C6 75 CF 18 9F 48 13 80 C6 B4 E3 54 9E 61 2C 91
6D D0 6F D9 37 65 3B 6E 58 3C 8E 02 A5 82 E9 06
70 68 68 0A 10 DD A3 43 CF B4 F7 4D 0E 7F DB 17
E3 CD AE 23 C0 D9 DE 4B 1C 58 BA 76 3A 3B 06 F7
AC 2E 73 54 A6 42 13 4C F5 CF 7D 6C 43 87 71 7A
42 1C C6 75 77 CC BE A3 4C 39 B9 56 29 A4 84 6D
B0 B3 0A 00 C6 CF 4F 4B AF 2A CD A6 7F 70 3D 4E
E7 A2 15 86 20 65 BD 47 37 3F 35 C7 D6 2B C7 16
1C 7E DD F1 C3 F0 2D 97 65 6B 9B 9F C8 93 D2 22
D9 F2 17 2D F7 D8 47 AA 62 8D 40 7D 77 A0 EA 2C
E1 A2 9C 7D 38 3E AF E9 DE C2 CD 72 72 92 10 68
A4 EB 8C 3C E1 F5 F4 D2 12 8E B7 2E 76 BE 1B B7
93 FC 9E 28 FB EC 8B 5F 5D 94 2D 2F 7D 98 36 07
B7 BE 46 76 AD 22 B1 1F B1 94 27 CA 0E 63 CF C0
8A E2 2B 04 AC 13 09 38 A0 C4 C8 8F 5F 8E 89 48
E7 E7 80 AB DD 79 FD A9 67 C4 FB B0 58 FB 11 2A
CA FF 40 7D 60 0D DD 7B F4 F0 E2 07 5C 23 A9 A4
EE 13 41 40 2C A9 F9 E4 A4 23 AE DE C3 12 A7 6A
38 DC 13 C5 76 E8 8A BB C1 35 C3 E7 80 7E A1 D4
9C F0 D0 4A 7F 09 3C F8 27 1C F5 63 33 AA D7 B6
CA BD 00 01 47 D1 E8 6E 79 6E DD BF 85 FB 7F 16
A9 61 AA BD 55 BE AE 94 C6 9F 18 55 69 49 C9 43
E5 8F FF 36 8A 0B 1A A9 4F 67 B5 1D 7D 1E 33 72
DF E8 42 ED 0F 4E 99 D4 7E 63 0D 5E C8 A7 7A A5
18 4B DE 45 E9 B0 D0 63 BC 13 D9 F3 16 2A 3E 98
9A 13 08 66 3C 5D 2B F0 FE 1A ED 68 00 DE ED BF
9C 09 F2 56 5F 97 86 28 E7 43 40 87 D0 F2 65 51
1A 71 FB CB 54 2F 2B 42 4A 44 11 7E 50 82 36 89
79 F6 E4 CD 4D 6F 6A 33 26 E8 23 BB CC F2 96 16
16 80 89 A3 63 3E 54 8F A9 36 30 16 59 ED E4 C7
7D EA 17 AC F8 31 46 F8 D7 CB 1F 71 B3 99 A4 7D

Ppk Modular END
Ppk ModularEx START
BE BE 5D 25 19 F6 A5 07 06 54 AC 41 3D E4 42 FE
D3 4A F2 4A 23 35 2F 5C 70 2E 5A 8C D8 3D FA 8F
EB 21 21 56 49 F7 53 C2 CE B8 D2 FD 5F C3 8F 0E
01 4F 5F 1D 7B 35 BF C6 CE BD 98 7E 15 CF CF 3C
FB FF 5F 75 C0 E3 B7 E9 6A F5 4E C6 29 3E 02 1D
B6 5F 7C 66 70 CE 7F 74 E9 8B 20 BB F9 0F C2 0C
11 B3 F2 E3 2B 58 05 0C 20 4F 0D DB 23 F2 4B 79
7C 0E 41 23 20 EC DA 1A 6E F8 A2 98 0E A6 D7 D4
65 D3 CE 2A B4 F7 62 D5 40 8D 43 2E 9F FC 24 63
1D 80 4B 2A AC C3 D1 F4 CA 83 0B 33 D7 36 72 97
2B 2A 7A 92 DE EF 9E 6F 15 66 8B 15 D3 89 1B 2D
1C 20 93 78 2F B3 9C 9E A7 CA A0 9F D9 66 A3 13
1D B9 30 8B 63 36 2F 5C 90 FB EC 7C 7B 8B 7E 4A
C4 25 85 67 45 4D 0B F7 26 26 73 2A D8 2F AF C7
97 57 03 0A B5 30 B3 2F 3E C9 11 86 ED 16 9D 2B
91 30 1E 5E 8F 27 15 A4 99 B6 18 CC 59 DB C9 08
3F A9 55 5E 5E CE 5B AD FB 7D 08 04 62 DC A9 88
96 FB DC 15 F6 31 F2 8C EB 0E 9E C6 10 C9 BF 6D
BE 62 42 4F DD 13 4E C9 7C 07 F9 B2 65 33 0A 0B
4C 51 D7 10 48 6A 07 9E 70 2A D5 2C 57 E9 4B 91
50 20 F7 40 7E 8B C7 7C D5 5A E8 B7 41 6D B3 DB
CE B4 6E 98 49 85 EB 38 A2 5B 4A 47 6E 4F C5 19
60 66 88 1E 1B 34 F7 C8 47 0C 24 6F 16 AF A3 A8
90 0A 9A F2 2F E3 14 DB 1E A7 38 6B F5 59 76 6B
CB D8 9A 41 27 B0 8C 9B EF E5 0E 0E 89 FF 4B 2F
3A E4 DA E4 65 D8 DB 4A 26 23 0C BA 1E 2A 9D A2
6E E5 02 AF 46 E0 78 28 E8 61 78 CB E4 86 B3 F7
41 5C 8C 0E DD 7F 18 3C 21 DC 33 92 1F AA 72 28
59 AB AD 5D 2D 28 EE 68 A2 F9 2C A1 71 F0 5C F3
33 77 52 5A 60 FF 01 A5 8B C9 81 E6 17 1A E7 6D
C6 EB 75 A3 98 60 07 92 66 BB AD 8F 40 FE 39 C8
55 2A 78 30 E1 26 A2 06 86 90 B6 11 09 24 83 99

Ppk ModularEx END
Ppk Exp = 1000100
Doing Partition Sign verification
XFsbl_PartVer: Spk Mod FFFE1CE0, Spk Mod Ex FFFE1EE0, Spk Exp 1000100
Spk Modular START
BB 62 99 8D FC A5 3F AB DE 1A 83 A1 89 0E 81 0A
78 03 D8 F8 F8 FA EB 00 54 27 B5 9B 08 E6 F9 61
3A A8 B9 D6 E8 63 E7 F3 9E CE C9 F3 95 0B D3 14
9D DB 24 18 B0 66 FE A0 97 FC F5 21 25 5D 82 0B
96 2C 80 C9 E2 3B B5 93 24 21 73 EE AB 2B 3C B8
E7 B0 34 2A 04 1A AD 7C F3 6C DB EB EE 80 48 4A
BC 72 5B F1 25 89 54 C6 41 89 67 AA A8 F7 ED 11
0E 1F 2D 77 AF A4 9E 40 40 E4 A0 08 94 65 22 E1
89 9F AA A1 21 B4 B5 D9 4B 23 9F CD 47 EC 41 26
D2 68 41 37 14 80 34 43 5F 0E 5E 54 45 78 14 C0
DF 5A A8 AF 9A 43 5F 98 59 1D 9B AE 6F 24 87 B9
36 4B BF 45 EF 54 BD 91 F5 B5 B3 7E 95 52 DE 1D
9F 9D D1 0D CA A9 DA 67 68 E0 B8 FF 99 57 C6 03
34 56 F3 F3 A1 CF FA 34 E6 CA 73 78 AA 43 91 BB
16 50 DC 1C 76 2C 73 52 5F 33 00 04 EF 40 94 5D
F9 87 8A 64 55 2B 72 A1 23 11 FA 55 BB DC 49 39
E6 23 14 80 BE 59 47 7C 86 D0 8B 29 D4 8C 2E F0
BE D4 EA 22 88 CD FD 1A 6E 2E C8 9A 1D C6 47 6D
F3 45 EB 72 33 00 FB D0 F7 E1 9A 54 26 93 00 E0
20 F4 EB 5A 35 80 65 5D AD 03 18 65 0A 94 BB AA
FB 5F F7 04 AC 6C 86 A8 4A DD 70 11 C2 D2 23 7B
5D 61 59 AC 51 55 20 92 2C 97 3E 9C 68 36 F7 79
DA EF 75 95 92 5D 2B 7C 0B 76 DE 0F 39 B2 E6 93
B9 96 86 61 2F 78 B9 B7 80 20 8E 14 2A 52 1F ED
0E E0 E5 7C 37 FB 65 57 B1 57 E6 3D FE 9F D8 09
D0 A9 BC 3E E0 34 8C 02 5A 4B 7C EC E5 CC 8F 1C
C5 8B AD A8 0E 0A 43 12 3E A7 17 22 2F 2C 19 D9
07 0E 78 FB 5A 38 A0 6D C6 7A B5 DB 36 0D 28 60
19 6E F9 85 D6 12 9C CD 93 F5 EF 03 6F 51 88 96
22 A0 32 8E 8C 13 4A B7 4C 42 DA B3 94 42 4D DE
CE DD 99 8F AC B8 9F E3 CA 6E 55 36 A1 85 37 75
31 F5 FD E9 25 92 7D FE 3A 50 22 8E 5E DF 2D DF

Spk Modular END
Spk ModularEx START
81 77 6D 31 AD 39 1A 09 B3 A7 6D 26 AA 34 12 C4
41 15 B5 49 8F C4 33 CA F1 DB F8 70 0C 5C 50 48
F9 83 B7 AC 8B 0D DB 19 B3 AD D7 86 E1 F1 45 D2
0D CB 87 51 FB E8 98 AF 73 69 02 4C E4 FD D5 C3
0D D2 53 FB E7 51 D1 CF 42 53 AC 5D C4 01 05 61
7B 69 49 35 3B EF D1 F5 9F 95 AD 09 DF 80 AA B3
3E E9 88 50 6C E5 A7 28 23 42 81 10 13 3B D8 5E
E0 B6 A1 76 07 A3 94 C7 7D 70 63 0E 6E DF 85 1A
6F 2D 44 9D 92 8E A8 52 66 7A FA B1 20 B1 CF CC
AF 4E CA 7C E0 BA AC 59 7E 24 B0 5B 3D B3 FF C6
69 2F BB B9 70 F7 18 26 E9 E0 78 F6 4C 3B 7D 79
AC 59 86 A1 1C 1E 59 EF AE 69 79 67 6E 79 96 74
C9 0C 41 4C 6E 5E 47 D8 F3 43 9D E3 D7 E4 A9 40
3E 7B 82 DD F3 FB 62 70 58 B2 C1 16 33 00 F7 7D
07 92 8C 91 ED BD FE E9 5B E6 42 1D 5B 26 79 66
40 B5 4C 07 11 80 3F 12 2E 52 13 5A F4 61 A5 A3
F0 4B 62 9D E6 33 33 A7 C1 00 D5 82 E1 B5 04 3D
D5 AB 11 AF E8 86 57 DA 24 82 91 25 FE 76 4F E4
70 C2 5B FB 51 C9 29 4D 90 27 F8 55 8E 33 4D FE
42 B7 D8 8A 20 81 B3 35 5F 58 D6 48 8A 2F CA F9
87 D1 DE 47 54 F8 0C 1B 54 4B 71 7E DD 43 2B 39
E1 7B F9 70 4F 76 1E 3E F9 D6 A6 09 31 6D 93 60
E8 24 4C 4A 60 B0 51 05 8D 3E F5 13 42 3C 77 5B
EA D4 88 05 AD 10 10 5B B8 24 6D 89 51 21 F0 30
31 2C AF 54 10 7B 1E D0 27 43 6E 82 B5 82 53 B8
07 EC E9 DF 1F 8D 75 DB 26 5F 1C 29 32 83 AC 28
A6 57 F1 C1 95 F1 31 F0 1E 75 BC 90 8A 30 FB F4
1B 73 E4 B7 81 F1 5C 99 40 FA A6 26 0C F3 ED 47
7A 7C ED 0C 72 51 68 05 DF 8D C4 5F 52 3F FD 98
F4 40 03 B5 4D 84 22 82 9E 14 E4 6A 80 5C 8F 20
B0 30 24 16 8D 8D 68 0D 42 91 0D 1A CD 83 2D 0D
18 DD 4E 27 2A 1E 0D FC 40 84 ED 4E 0C 9A F8 18

Spk ModularEx END
Spk Exp 1000100
Partition Verification done
Decryption Enabled
Decryption Successful
Partition 1 Load Success
All Partitions Loaded
================= In Stage 4 ============
PMU-FW is not running, certain applications may not be supported.
Protection configuration applied
Running Cpu Handoff address: 0x0, Exec State: 0
Exit from FSBL
Hello World

 

Best Regards,
Srikanth
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Registered: ‎06-23-2020

Thanks @savula for verifying the process and sharing with me!

Your process looks not different from what I'm doing except for some software version detail:

1.  From your booting log as below, you are testing on ZCU104  ZU7EV board same as mine.

"Xilinx Zynq MP First Stage Boot Loader
Release 2019.2 Sep 3 2020 - 13:01:56
Reset Mode : System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU7EV"

2. One difference is that Release 2019.2 FSBL is used in your process.

I tried one more thing and downloaded  "2019.1-zcu104-release" then use extracted 2019.1 release zynqmo_fsbl.elf to run one more test.  However, it still failed badly and please see attached screenshot including my BIF file and serial terminal output.

Can you do me a favor and share me with your BOOT.BINs so I could use them program BBRAM key and run secure boot test?

1> One BOOT.BIN generated using xilskey_bbramps_zynqmp_example_1.elf.

2> One BOOT.BIN generated from secure boot BIF.

My email is zl_hk100@hotmail.com

Much appreciated!

Lei

VirtualBox_linuxvm_03_09_2020_10_17_41.png
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Registered: ‎06-23-2020

Hi @savula,

One more thing since 90 days warranty is soon to be due on my ZCU104 board purchased back in June this year.

In case by USING YOUR BOOT.BIN, the secure boot still fails.   Can we safely say something wrong or not provisioned properly for my ZCU104 Evaluation board?  Or DOES XILINX have pre-compiled hardware unit test utility to make sure its evaluation board as ZCU104's CSU hardware Crypto engine is functioning correctly? Otherwise,   Even I request for the board replacement,  still not sure new board will be working for secure boot.

We have been together investing significant time in bringing up simple BBRAM based hello_app decrypting case exactly referring to xapp1319 and haven't exercise any further meaningful customization yet.    

Regards,

Lei

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Hi @savula,     Can you please help and give feedback on my questions?  Thanks,  Lei

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Hi @lei_zhou , 

I used the ZCU106 board and not ZCU104 board. Both have the same device in it. But I would expect the bif works for ZCU104 board also.

to check the Cryptographic functionality use below examples.

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilsecure/examples/xilsecure_aes_example.c

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilsecure/examples/xilsecure_rsa_example.c

Run above examples through JTAG boot mode. If they are success then the Crypto engine is working fine.

I dont have the ZCU104 board with me to test it on hardware, but I will create images and send them to you.

 

Best Regards,
Srikanth
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Thanks @savula,    You might have read my POST 

https://forums.xilinx.com/t5/Embedded-Linux/Fail-to-run-xilsecure-4-2-simple-aes-encrypt-decrypt-example-on/td-p/1143183 and I tried these xilsecure example under sd boot mode.   By JTAG debugging, they were failing due to the same reason as secure boot flow.

In terms of running under JTAG mode,  tried "https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilsecure/examples/xilsecure_simple_aes_example.c".  Failed and terminal stops after FSBL existed.

For embeddedsw/lib/sw_services/xilsecure/examples/xilsecure_aes_example.c,   please share with exact steps how to run under JTAG mode to make sure we are on same page. 

Again right now we start suspecting hardware issue and please share me exact steps so we know what we are doing!   Ideally share me with the binary and command line steps how to run using Vitis XSCT to exclude any dev environment difference.

Thanks for consistent supporting!

Lei

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Hi @savula,

Tried most bare-metal way to run two basic xilsecure examples to avoid any potential dev environment difference on my ZCU104 and failing snapshot as attached.

1>  USE Vitis XSCT command line to load pre-built FSBL.elf extracted from xilinx-zcu104-v2020.1-final.bsp.

2>  Import HDF also from xilinx-zcu104-v2020.1-final.bsp in Vitis and built following example executable in vitis.  

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilsecure/examples/xilsecure_rsa_generic_example.c AND:

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilsecure/examples/xilsecure_simple_aes_example.c

3> Run following XSCT commands to run FSBL and also example executables.

$dow /home/leizhou/workspace/test/xilinx-zcu104-2020.1/pre-built/linux/images/zynqmp_fsbl.elf
$con
$stop
$dow /home/leizhou/workspace/vitis/xilsecure_simple_aes_example_2/Debug/xilsecure_simple_aes_example_2.elf
$con

After doing all these validation,   can we say my ZCU104 board isn't working and need to return replacement?

Regards,

Lei

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Forgot attaching the snapshot.

VirtualBox_linuxvm_04_09_2020_13_39_54.png
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