I am currently trying to seek out the following information regarding booting the MPSoC:
1. Which partitions are required in order to configure the PS and not just the PL?
My early prototype design does not contain any actual sw though the final design will be running Linux. I have a block diagram with a PS UltraScale+ block configured to output a PL clock to a simple led blinker on a custom board. The leds do not if I use this clock, however if I use a clock input on the PL, they do blink.
2. Where can I find information about the manner in which the configuration memories are programmed through JTAG?
It does not seem clear to me the different ways in which the configuration memories are programmed. I hear rumours about the FSBL having to be programmed first. But clearly, JTAG programming works with only a .bit file.
3. Is the PMUFW required in a boot image? When is it required?
4. Why must the .bin file contain a FSBL, and when programming a configuration memory, another FSBL must be added?
I'm sure you understand that I am more than slightly confused by the many ways in which an MPSoC can be programmed, let alone debugged. E.g: What is the difference between programming/configuring through SDK and Vivado?
Excuse the rant. I studied UG1137 in further detail, which helped. I'll answer my own questions in order to help others. 1. FSBL initiates MIO, clocks etc so it must be included in order to use PS. Therefore, simply programming the bitstream (.bit) file to the MPSoC will only result in the PL part being configured. 2. UG1137, Ch. 10 etc. 3. PMUFW seems to only be required for specific non-default reset configurations. 4. An OCM FSBL (not Execute-in-place FSBL) must initiate the PS in order to gain access to the configuration memory. The FSBL contained in the boot image will initiate the PS at the actual boot.