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Visitor spectranetix
Visitor
754 Views
Registered: ‎10-15-2018

Intermittent eMMC boot problems

XCZU4EG and XCZU19EG both intermittently fail to boot from Micron MTFC16GAAECN-4M. When boot fails, the FSBL is not started and register PMU_GLOBAL.CSU_BR_ERROR reports 0x80003B00

 

All of the changes recommended in AR71019 have been implemented.

 

I think my PCB layout and hardware are OK because when the fsbl runs, the PL is loaded and u-boot and

Linux load and run with out problems. Also, when the system is booted from JTAG, there haven't been problems formatting

the eMMC and writing files to it.

 

We are using Vivado 2018.2.1 and Petalunux 2018.2

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7 Replies
Moderator
Moderator
708 Views
Registered: ‎06-27-2017

Re: Intermittent eMMC boot problems

Hi @spectranetix,

 

From the BootROM Error Code register, 0x3B(check TRM ug1085) represents "Reading failed from the selected boot device." So BootROM is not able  read the information (like FSBL) to OCM.

 

Regards
Kranthi
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Don't forget to reply, kudo, and accept as solution.

Best Regards
Kranthi
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Visitor spectranetix
Visitor
698 Views
Registered: ‎10-15-2018

Re: Intermittent eMMC boot problems

Hi Gudishak,

 

Thanks for your response.

 

We know that when the system doesn't boot it's because the CSU can't read in the FSBL.

 

Our question is why does  it boot most of the time but fails occasionally? Is there anything we can do

to make it more robust?

 

Thanks,

 

Dan Moyles

Spetranetix Inc

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Moderator
Moderator
676 Views
Registered: ‎06-27-2017

Re: Intermittent eMMC boot problems

@spectranetix,

 

Have you tried decreasing the speed of SDIO and boot?

Is everything working fine at standalone sdk examples for SD/eMMC?

 

Regards
Kranthi
--------------------------
Don't forget to reply, kudo, and accept as solution.

Best Regards
Kranthi
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Don't forget to reply, kudo, and accept as solution.
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Xilinx Employee
Xilinx Employee
666 Views
Registered: ‎10-11-2011

Re: Intermittent eMMC boot problems

In the past I saw similar behaviors if the power up sequence is not respected and the IO are coming up NOT tristated.

I suggest to run the standalone example (based on Xilffs) to "stress test" the hardware and see if you can reproduce a failure.

From what you are describing, you should power cycle between tests and always boot in JTAG boot mode.

Maybe a XSCT tcl script is best.

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Visitor spectranetix
Visitor
647 Views
Registered: ‎10-15-2018

Re: Intermittent eMMC boot problems

We have implemented the changes in AR69368 and the FSBL, u-boot and Linux are all running the eMMC at 50 MHz. However,it appears that the boot failure occurs when the CSU is trying to download the FSBL, so dropping the clock frequency does not fix the problem.

 

WRT the power-up sequence, the MIO and eMMC are using the same +1.8V supply. The eMMC +3.3V supply is brought up simultaneously with the +1.8V. The PS_POR_B signal is controlled by the +1.8V and is released about 100ms after the +1.8V is good.

 

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Visitor spectranetix
Visitor
615 Views
Registered: ‎10-15-2018

Re: Intermittent eMMC boot problems

Our fix is to replace the Micron MTFC16GAKAECN-4M with MTFC8GAKAJCN-4M. The 8G part boots without problems.

 

It appears that there is a compatibility issue with Zynq Ultrascale+ and Micron MTFC16G

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Xilinx Employee
Xilinx Employee
595 Views
Registered: ‎10-11-2011

Re: Intermittent eMMC boot problems

I am surprised about the claim but MTFC16G is NOT in the list from AR#65463.

I am glad you found a valid alternative.

 

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