11-23-2018 02:00 AM
I am using Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit for my design. As you can see, I have put my whole design down here. I want to boot Microblaze from BRAM and nothing else(flash, SD card etc.) I am using BRAM with LMB controller. Also, I am open to AXI bus. I have tried every possible settings from AXI/LMB BRAM controller. The initialization of BRAM has issues. It gives random values and not correct ones from fed COE file.
[Memdata 28-122] data2mem failed with parsing error. check the bmm file or the bmm_info_* properties on the BRAM components. The design BRAM components initialization strings have not been updated.
Please check the block design, BRAM settings in screenshot and let me know where I am going wrong!
11-28-2018 06:20 PM
11-30-2018 10:21 AM
The example only shows the JTAG boot flow but it's a good starting point.
I got it working from flash with an image created by this .bif.
Where hello_a53.elf is really a "stub" to park the processor and hello_my_mb.bin is the binary version of your MB application loaded in DDR. It's easier if MB application is in BRAM and that step is NOT required.
//arch = zynqmp; split = false; format = BIN
[destination_device = pl] design_1_wrapper.bit
[destination_cpu = a53-0] hello_a53.elf
[load = 0x0] hello_my_mb.bin