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Visitor
Visitor
485 Views
Registered: ‎02-06-2019

PS Flash Programming using BS Tool

Hello,

I have a board that has Zynq 7020 and i want to program the flash device using the third party boundary-scan tool. Since there are many boundary-scan cells in the boundary-scan chain, shifting the data that has to be programmed may take quite some time, so attached boundary scan tool's application note describes a method that can reduce the programming time when the flash device to be programmed is connected to the FPGA.

The flash device (N25Q128A) is connected to PS side (MIOS<1..6> pins). These mio pins are connected to PS side. Therefore, these pins can not be controlled from PL side directly. I can not apply application given in the attachment to my board. Do you have any advise for this situation? 

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Xilinx Employee
Xilinx Employee
442 Views
Registered: ‎09-01-2014

Can you detect PS from your JTAG chain, if so there should be no problem to program QSPI flash.
Programming PS QSPI flash does not use PL logic.
Do you try to use Xilinx tools to program QSPI flash?
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Visitor
Visitor
416 Views
Registered: ‎02-06-2019

I can program QSPI flash using Xilinx Tools. Also, I can program flash using our third party Boundary Scan Tool. Because of the long scan-chain it takes much time program the flash. I am working on the reducing that programming time.

In the attached document, constraint file is used for determining the pins of QSPI flash's data, clock and ss signals. These pins are connected to PS side, so I cannot use them in constraint file.

Is there a possible way that PL IP controls the QSPI controller of PS?

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Xilinx Employee
Xilinx Employee
410 Views
Registered: ‎09-01-2014

Xilinx tools use a u-boot to program the PS QSPI. U-boot is executed on DDR running by Cortex-a9. So there is nothing can do from PL side.
But PS QSPI registers can be accessed from PL side, so technically you can control the PS QSPI from PL IP. but we don’t have this kind of solution.

I took a look at your attachment, it’s for the flash device connected to PL. I don’t think it will work for PS QSPI.
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