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Registered: ‎05-04-2018

Restart Zynq From Watchdog

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I am transitioning a design from Artix to Zynq, and I have everything working except for the watchdog timer. I am running Vivado 2018.3 on Windows 10.

To help me understand it, I built a simple Zynq PS on my ZedBoard and I am running the xscuwdt_polled_example.c.

My only modification is to have the watchdog reset CPU0 only.

  Xil_Out32(0xF8000008, 0x0000DF0D);  // SLCR_UNLOCK Unlock SLCR
  Xil_Out32(0xF800024C, 0x00000001);  // RS_AWDT_CTRL - Watchdog resets CPU0 only
  Xil_Out32(0xF8000004, 0x0000767B);  // SLCR_LOCK Lock SLCR

 I created a boot image and programmed it into the ZedBoard SPI.  After the program runs, the watchdog expires and the system reboots. This is the behavior I want.

However, if I put the same boot.bin into an SD card and boot from that, the program runs but does not reboot the system after the watchdog expires. How do I get the watchdog to reboot from SD?

 

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Joe Samson

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Explorer
Explorer
334 Views
Registered: ‎10-05-2010

I was trying to just reset CPU0, but I have better luck now by resetting the whole system.

I've got it working now on 2 different platforms: from flash on the zedboard and from SD card on the snickerdoodle.

Every time I make a new bitstream I check to make sure it still works. If it keeps working I'll mark a solution next week.

 

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Joe

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Xilinx Employee
Xilinx Employee
340 Views
Registered: ‎10-11-2011

Are you only resetting the CPU or the whole system?

Use XSDB to connect to the target after the failure and read the REBOOT_REGISTER or see where the PC is.

It should give you an error for the failed boot. Hopefully a clue.

 

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Highlighted
Explorer
Explorer
335 Views
Registered: ‎10-05-2010

I was trying to just reset CPU0, but I have better luck now by resetting the whole system.

I've got it working now on 2 different platforms: from flash on the zedboard and from SD card on the snickerdoodle.

Every time I make a new bitstream I check to make sure it still works. If it keeps working I'll mark a solution next week.

 

---

Joe

View solution in original post

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Xilinx Employee
Xilinx Employee
254 Views
Registered: ‎10-11-2011

Any update?

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Highlighted
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Registered: ‎05-04-2018

Thank you for the reminder. It looks like switching to resetting both processors does what I want, so I'll close the case.

 

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Joe

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