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345 Views
Registered: ‎06-27-2018

Ultrascale ARM DAP

We are using the Ultra96 eval board and we are noticing weird behavior with the JTAG port. After enabling the ARM DAP (using the JTAG_CTRL instruction), we can see the ARM DAP IDCODE and communicate with the ARM DAP. However, after a little while, the ARM DAP looks be disabled again. We are not sure what is causing the ARM DAP to be disabled.

Does anyone know under what conditions the ARM DAP is disabled?

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9 Replies
Moderator
Moderator
300 Views
Registered: ‎06-27-2017

Re: Ultrascale ARM DAP

Hi @terence_nakada ,

Are you booting secure image? or Have you programmed efuse?

Could you please check the register contents mentioned in below AR? May be this will helps if something went wrong.

This is when you are trying for secure boot. Just give a try

 

Best Regards
Kranthi
--------------------------
Don't forget to reply, kudo, and accept as solution.
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284 Views
Registered: ‎06-27-2018

Re: Ultrascale ARM DAP

Hello Kranthi,

We are using the Ultra96 eval board and set it up to not boot (using the DIP switches to boot off of SD card and removed the SD card). We have not programmed the efuse. The JTAG port works, but it's just doesn't seem consistent. The total IR length seems to change (it should be 16, but sometimes is 10). I found a post that says to do some TMS resets and that seemed to resolve the IR length issue. But, we are trying to figure what is causing the ARM DAP to be removed from the chain (after adding it).

Any ideas?

 

Thanks,

Terence

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267 Views
Registered: ‎06-27-2018

Re: Ultrascale ARM DAP

Also, are you aware of any JTAG issues if you have multiple devices in the scan chain? We can debug the ARM core if the Ultrascale is the only device in the scan chain, but are running into problems when there are multiple JTAG devices in the scan chain.

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Xilinx Employee
Xilinx Employee
229 Views
Registered: ‎10-11-2011

Re: Ultrascale ARM DAP

If you are doing this "using the DIP switches to boot off of SD card and removed the SD card", there's a good chance you are seeing the siliocn locking down after a timeout (because is failing boot).

If you don't want to boot you should select JTAG boot mode. If you see JTAG issues in that case than you have a real problem.

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196 Views
Registered: ‎06-27-2018

Re: Ultrascale ARM DAP

I tried using JTAG boot mode and saw similar results. It looks like after I access the ARM DAP, eventually the ARM DAP is disabled. It does look like the silicon is locking down after a timeout (after ARM DAP access). Is there a way to disable this timeout?

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Moderator
Moderator
180 Views
Registered: ‎09-12-2007

Re: Ultrascale ARM DAP

Do you see the same issue with just a single ultra96 on your jtag chain?

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168 Views
Registered: ‎06-27-2018

Re: Ultrascale ARM DAP

Yes, but not as often. But, for the setup with the multiple devices I am daisy chaining with flying leads and have to lower the TCK. So, it might be a timing issue with regards to the differences I'm seeing.

But, it does seem like the ARM DAP is disabled after a certain amount of time.

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Moderator
Moderator
150 Views
Registered: ‎09-12-2007

Re: Ultrascale ARM DAP

The hw_server will continually poll the JTAG controll register and will enable the ARM DAP. So, it should always be there unless there is something preventng it.

 

Can you read the error_status?

 

in XSCT:

  • connect
  • jtag targets X
    • where X is the TAP

Then run the proc below

proc error_status {} {
    set s [jtag seq]
    $s state RESET
    $s irshift -state IDLE -int 12 4004
    $s drshift -state IDLE -tdi 1 -capture 121
    set r [$s run]
    $s delete
    binary scan [string reverse [binary format H* $r]] H* x
    return 0x$x
}

 

I have also added a script that you can use on the daisy chain to read all the jtag contr on all devices on the chain.

You can use this to enable all devices too.

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135 Views
Registered: ‎06-27-2018

Re: Ultrascale ARM DAP

We are using our own JTAG controller and software.

After scanning the ERROR_STATUS jtag instruction, the target is returning is usually 0x41 from the data register (46-bit scan).

For the setup where the Ultrascale is by itself in the scan chain. We are able to enable the ARM DAP and then do ARM DPACC and APACC accesses and we can connect to the ARM cores. For the setup where there are multiple devices in the scan chain, after any ARM DPACC/APACC access, the ACK bits are either 001=WAIT or 000, then the ARM DAP seems to be disabled.

For either case, the ERROR_STATUS is usually return 0x41 (although sometimes it returns 0x6001041).

 

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