I'm presently attempting to setup a debugging session on the Ultrascale+ A53 Cores and I find that as I am attempting to attach my debugging pod, several seconds of application execution time seem to elapse in the process, during which several power-on self-tests I intend to investigate take place. This situation requires me to reset the A53 cores into a known state prior to power-on self-test execution and it would appear from the Ultrascale+ documentation there are several methods for executing a system reset. The most promising methodology among these appears to be the PS-Only Reset outlined on page 1129 of the UG1085 manual, triggered by a set of direct writes to the Ultrascale+ registers. My interpretation of the instructions to perform this operation is as follows:
1. Write a value of 0x00000001 to PMU_GLOBAL.PS_CNTRL at address 0xFFD80004.
2. Write a value of 0x0000000A to PMU_GLOBAL.AIB_CNTRL at address 0xFFD80600.
3. Write a value of 0x00000400 to PMU_GLOBAL.GLOBAL_RESET at address 0xFFD80608.
4. Write a value of 0x00000000 to PMU_GLOBAL.AIB_CNTRL at address 0xFFD80600.
Unfortunately, I’ve not had much success with this set of commands. I was wondering if, I had inadvertently missed a step in the sequence or if there is a better method to accomplish a reset of the A53 Core subsystem.