In stand-alone application, i write over slcr registers so that it allows SRST and not just the CPU reset.
#include <xil_misc_psreset_api.h>
#define A9_RS_AWDT_CTRL (XSLCR_BASEADDR + 0x24C)
#define XSLCR_LOCK_ADDR (XSLCR_BASEADDR + 0x4)
#define XSLCR_LOCK_CODE 0x0000767B
void PrivateWatchdog_init()
{
int Status = XST_SUCCESS;
u8 Priority, Trigger;
XScuWdt_Config *WdtConfigPtr;
WdtConfigPtr = XScuWdt_LookupConfig(WatchdogDeviceId);
Status = XScuWdt_CfgInitialize(WdtPtr, WdtConfigPtr,
WdtConfigPtr->BaseAddr);
//--------if watchdog mode----------
XScuWdt_SetWdMode(WdtPtr);
XScuWdt_LoadWdt(WdtPtr, WDT_LOAD_VALUE);
Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
// RS_AWDT_CTRL for SRST
Xil_Out32(A9_RS_AWDT_CTRL, 0); //1 = CPU0, 2 = CPU1, 0 = system-level
Xil_Out32(XSLCR_LOCK_ADDR, XSLCR_LOCK_CODE);//lock the slcr
}After this I enable interrupt controller
XScuGic_Config *IntcConfig;
IntcConfig = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID);
Status = XScuGic_CfgInitialize(&IntrCntrl, IntcConfig,IntcConfig->CpuBaseAddress);
if(Status != XST_SUCCESS)
xil_printf("\nInterrupt controller not initialised");
//connect Intr controller's intr-handler to the hardware
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
(Xil_ExceptionHandler) XScuGic_InterruptHandler, &IntrCntrl);
….
….
//initialise and locally enable relevant peripherals
PrivateWatchdog_init();
// Enable exceptions in the Processor after all peripherals are connected
Xil_ExceptionEnable();
//now start the watchdog. When it expires, the debug breakpoint should go back to start of the program (Flash is read and bootROM loaded the code)
XScuWdt_RestartWdt(&WatchDogTimer);
XScuWdt_Start(&WatchDogTimer);But no success. can you spot anything missing?
