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jhouee
Observer
Observer
481 Views
Registered: ‎11-27-2015

ZYNQ MP FSBL lower power consumption

Hello,

I could generate a Boot loader in QSPI and load my FPGA in the QSPI mode.

However I realize my xczu9eg-ffvc900-1-e  consumes 600mA more on 3V3 compare to a simple load via hardware management in vivado.

Is there a way to shut down paert of the PS part (A53, blocks...) after I PL fabric is loaded since I just need the PL par of this FPGA

Regards

Johann

 

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denist
Xilinx Employee
Xilinx Employee
415 Views
Registered: ‎10-11-2011

If you have the PMUFW loaded you could power off the full power domain but calling this function (maybe from the FSBL after all your loading is done).

XPm_ForcePowerDown(NODE_FPD, REQUEST_ACK_BLOCKING);

You do need to do some Initialization of the PM before this.

Maybe take a look at xilpm_selfsuspend_example.c as reference.

 

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