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Adventurer
Adventurer
745 Views
Registered: ‎08-26-2017

Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

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Hi, 

 

We have designed a custom board using Zynq 7000 part XC7Z020-CLG400. We are facing two problems with device boot and JTAG

1) JTAG connection is not stable, to be precise device gets detected momentarily at power up and then does not show up again

2) DAP does not show up when device is detected (momentary although)

 

Can someone please throw some light on as to what could be the potential problem/s for the above problems and how do I address them?

 

Thanks and Regards,

Ajay Kumar G

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Adventurer
Adventurer
717 Views
Registered: ‎08-26-2017

Re: Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

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Hi,

 

After further debugging, it was found that it is a consequence of improper power sequence and reset sequencing. We found some design corrections that need to be fixed for the sequence to happen properly. 

 

Thanks and Regards,

Ajay Kumar G

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4 Replies
Adventurer
Adventurer
718 Views
Registered: ‎08-26-2017

Re: Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

Jump to solution

Hi,

 

After further debugging, it was found that it is a consequence of improper power sequence and reset sequencing. We found some design corrections that need to be fixed for the sequence to happen properly. 

 

Thanks and Regards,

Ajay Kumar G

View solution in original post

Observer mjdbishop
Observer
205 Views
Registered: ‎03-25-2009

Re: Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

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Hi Ajay

I'm having similar problems with not seeing the DAP after a JTAG Boot on a custom board - MIO bits all zero.  Can you share the wrong and particularly the right way to sequence power and control signals.  Especially what the gotchas are. I have read the DS, Um, ARs, ....  Very interested in a holistic solution with sequence and delays matched to the hardware - just need some guidance on what the whitespace between the lines in the documentation says.

From reading other posts I can see that two other things to try are a (warm) POR cycle once everything has stabilised [AR# 58053] and disabling the PLLs at boot [AR# 54195] MIO[6] <= 1.

If you can assist I would be most grateful

Martin

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Observer mjdbishop
Observer
173 Views
Registered: ‎03-25-2009

Re: Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

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Hi Ajay

I have resolved my problems - POR was not being driven out by the CPLD and strange behaviour resulted ...

The key point is to ensure that the critical signals, to/from the SoC, can be examined directly rather than through additional logic (my undoing).  In plain english, scope PsClk, Init_n, Por_n, etc.  The root cause may be very simple.

Best Regards

Martin

Adventurer
Adventurer
127 Views
Registered: ‎08-26-2017

Re: Zynq 7000 Custom Board : JTAG BOOT and DAP Issues

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Hi @mjdbishop 

Sorry to have not able to respond to your query on time. I have infact not received any notification in my inbox and did not login to forums in recent past. However, am glad that you were able to find the root cause and resolve it.

Thanks and Regards,

Ajay Kumar G

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