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AlexProulx
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Registered: ‎07-09-2020

Zynq-7000 - DFT Boot Mode

Good Day,

 

I am trying to understand exactly what is referred to by the Design for Test (DFT) boot mode for the Zynq-7000.  I can't seem to find any Xilinx documentation on the subject. 

 

More specifically, I want to know what exactly is affected by the DFT JTAG Disable and DFT Mode Disable eFUSE.

 

My first assumption was that it referred to the JTAG boot mode since the TRM states: "When enabled, the internal memory and configuration are completely cleared, and the device is place in an unsecure mode, disabling all security features". This description would match up with what occurs when the BootROM detects JTAG mode from the MIO pins, however, the same paragraph also states that the DFT mode bypasses the BootROM code, which is not true of JTAG mode. Furthermore, if DFT mode was synonymous to JTAG mode, the DFT JTAG Disable eFUSE would render the mode fairly useless, and then why would there be  a separate eFUSE for DFT Mode Disable?

 

I now assume that it has to be a software debug mode inside the ARM's Coresight architecture, however I can't seem to find any documentation on how this specific boot mode would be entered.

 

Any pointers in the right direction would be much appreciated!

 

Thanks,

 

Alex

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savula
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Registered: ‎10-30-2017

Hi @AlexProulx 

 

The Design for Test (DFT) boot mode is internal to Xilinx and this boot mode is not available for customers. 

Best Regards,
Srikanth
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yiyang.su
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Registered: ‎04-09-2019

Hi @savula

in https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilskey/examples/xilskey_input.h two macros such as XSK_EFUSEPS_DISABLE_DFT_JTAG and XSK_EFUSEPS_DISABLE_DFT_MODE are defined for DFT. Current i am using xilskey_efuse_example.c and xilskey_input.h to flash efuses and enable secure boot.

Cited from https://www.xilinx.com/support/documentation/white_papers/wp426-zynq-7000-secure-boot.pdf, "While Zynq-7000 AP SoCs have been designed to ensure these test features do not pose vulnerability, the user can permanently disable them. When debug capabilities are no longer needed and device security is paramount, the user can blow redundant eFUSEs to permanently disable the device's test capabilities."

You mentioned "The Design for Test (DFT) boot mode is internal to Xilinx and this boot mode is not available for customers", then i would like to know how shall i deal with these two macros? TRUE or FALSE? Or does this mean no matter TRUE of FALSE of these two macros they won't have any effect?

Best Regards

Yang

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