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Registered: ‎04-17-2018

Zynq PL eFuse programming error

I am following UG908 (https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug908-vivado-programming-debugging.pdf) for programming the eFuse registers of a Zynq Z-7030 through Vivado 2017.3. Once I confirm my programming settings, however, I get the following console output:

ERROR: [Labtools 27-3370] Could not set Zynq target in xsdb.

I cannot find any information about this particular error. Can anyone provide any help?

Thanks!

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-11-2011

Re: Zynq PL eFuse programming error

I suggest to manually launch XSCT from XSDK and see if the command "targets" lists the processors.

Maybe you are not booting in JTAG boot mode and for some reason the procesors are not available?

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Registered: ‎04-17-2018

Re: Zynq PL eFuse programming error

Hello denist,

Thanks for your response. I have had success with XSCT seeing the processors in the JTAG chain. This is the output I get from XSCT

xsct% connect
tcfchan#2
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0xffff4ce8 (Suspended)
xsct% Info: ARM Cortex-A9 MPCore #1 (target 3) Stopped at 0xffffff34 (Suspended)
xsct% targets
  1  APU
     2  ARM Cortex-A9 MPCore #0 (Suspended)
     3  ARM Cortex-A9 MPCore #1 (Suspended)
  4  xc7z030
  5  APU
     6  ARM Cortex-A9 MPCore #0 (Running)
     7  ARM Cortex-A9 MPCore #1 (Running)
  8  xc7z030
xsct% 

Please let me know if anything seems wrong here.

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-11-2011

Re: Zynq PL eFuse programming error

Do you have two identical devices on the same JTAG chain?

Maybe the tool has a problem with that.

 

 

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Registered: ‎04-17-2018

Re: Zynq PL eFuse programming error

denist,

Yes I do in fact have two identical Z-7030's in the same JTAG chain in this design. Is there documentation that confirms this as an issue? And do you know of a potential workaround?

Thanks so much for your help!

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Registered: ‎04-17-2018

Re: Zynq PL eFuse programming error

For what it's worth, I have found this to be a very similar issue to what is discussed here https://www.xilinx.com/support/answers/58584.html

When pulling MIO2 high to boot the Zynq's in independent JTAG mode, the PL eFuse programming succeeds. I am using the 2017.3 tools, is this an issue that is/will be fixed in a future version?

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Newbie
Newbie
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Registered: ‎06-09-2020

Re: Zynq PL eFuse programming error

Dear Xilinx support,

I am seeing the same error message here, but in my case, there is just one Zynq in the JTAG chain:

xsct% targets
 1  DAP: JEP106 0x000, Part 0x000
    2  ARMv7M Core #0 (Running)
 3  APU
    4  ARM Cortex-A9 MPCore #0 (Running)
    5  ARM Cortex-A9 MPCore #1 (Running)
 6  xc7z020 

I am on Windows 10, and I have tried at least Vivado versions 2017.3.1, 2017.4.1, 2018.3, 2019.1, 2019.2, 2020.1; none of them worked.

I am using a Platform Cable USB II. Zynq is properly detected by Vivado, and I can read back XADC etc.

Zynq usually comes up in QSPI boot mode. I tried JTAG boot mode as well, but that didn't help either.

I managed to program the eFuses by using iMPACT 14.6 on Windows 7, but that is not really an option (Windows 7 being dead).

So how do I get this to work?

Best regards,
Th. Betker

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-11-2011

Re: Zynq PL eFuse programming error

Well, I see an ARMv7M Core there so there's definitely something else in the JTAG chain.

Do you have any way to disable or bypass that device?

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Newbie
Newbie
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Registered: ‎06-09-2020

Re: Zynq PL eFuse programming error

No, we cannot bypass that device; I would have tried that already if I could.

Also, the presence of this device was never an issue with iMPACT (and still isn't), so I am not entirely sure why it should be an issue with Vivado.

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-11-2011

Re: Zynq PL eFuse programming error

Have you tried https://www.xilinx.com/support/answers/61312.html?

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Newbie
Newbie
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Registered: ‎06-09-2020

Re: Zynq PL eFuse programming error

Hello denist,

we have opened a Xilinx case for this, and a colleague of yours is already working on it to reproduce the issue.

About AR# 61312: The ARMv7 Core seems to be recognized already by Vivado. I may try giving it another name when I have the time, but frankly, I don't see a reason why this should change anything. Or is there something hidden in Vivado that makes you think otherwise?

Best regards,
Thomas

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