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Gatsby_Van
Visitor
Visitor
285 Views
Registered: ‎10-21-2020

Zynq SoC QSPI Flash Program Issue

FPGA: XC7Z100FFG900

FLASH: S25FL256S (Uniform 64KB sectors)

Vivado version: 2019.1.3

 

Hi,

I was trying to program my QSPI flash memory on my board.

However, it seems that the first 8 bytes in each bank (128Mb) of flash cannot be written.

The 0x00000000~0x00000007 and 0x01000000~0x01000007 always remains as 0xFF after erase, and cannot be programmed again.

 

Here is what i did:

1. Erase the whole chip using Bulk Erase Command. [Send: 0x60]

2. Perform a blank-check in 0x00000000~0x000000FF and 0x01000000~0x010000FF. [Read back, all the bytes are 0xFF]

3. Program 0x00000000~0x000000FF and 0x01000000~0x010000FF with an increased number serial (0x00~0xFF)

   [Send: 0x12      0x00 0x00 x00 0x00      0x00 ... 0xFF]

   [Send: 0x12      0x01 0x00 x00 0x00      0x00 ... 0xFF]

4. Read back. (The first 8 bytes cannot be written)

 0x00000000~0x0000100F: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF  0x08 0x09 0x0A 0x0B ... 0xFD 0xFE 0xFF

 0x01000000~0x0100000F: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF  0x08 0x09 0x0A 0x0B ... 0xFD 0xFE 0xFF

 

But when I try other addresses, such as 0x00000100~0x00000200, I can read exactly what I write.

How can I write the first 8 bytes in each bank of S25FL256S ?

THANKS.

 

 

 

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1 Reply
denist
Xilinx Employee
Xilinx Employee
174 Views
Registered: ‎10-11-2011

zynq-7000 controller has a strange behavior in linear mode around the 16 MB boundaries. It is documented in ARs and TRM.

In summary I would say, stay at least 32K away from 0x0 and every 16MB boundary IF the controller is in linear mode.

NOTE: The bootROM uses linear mode but (unless you are booting with RSA) the first read is at 0x10 so even an image at 0x0 boots correctly.

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