02-07-2019 08:52 AM
Introduction: ZynqMP ZU3CG, GEM0 attached to GT Lane0, Reference source: RefClk0, RefClk0 clock derived from Silabs Si5344 generator.When I turn on GEM0, rebuild PMU firmware and FSBL with _DEBUG_DETAILED then trying to start system by JTAG download, I get the following messages on console:
XFSBL_PSU_INIT_FAILED ================= In Stage Err ============ Fsbl Error Status: 0x0#SERDES initialization timed out XFSBXL_PPFSUW_:IN ICT_aFlAIlLiEDn =R==O=M== =P==W=R==D=N== =H=and Sta.Donr ============ Fsbl Error Status: 0x0
What does it mean? Do I miss something?
02-08-2019 05:42 AM
This message means your SERDES did not initialize correctly. In psu_init the code loops waiting for the SERDES to initialize, if that does not happen in a prescribed time, the code times out. Review your design.
02-08-2019 06:37 AM