We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

ACAP and SoC Boot and Configuration

Showing results for 
Search instead for 
Did you mean: 

Discuss board bring-up, boot and configuration topics for Zynq-7000, Zynq UltraScale+ MPSoC and MicroBlaze based FPGA designs. Topics include secure and non-secure boot flow including programming the boot device (QSPI, JTAG, SD eMMC, NAND, NOR), bootrom, FSBL, loading of the bitstream, fallback/multi-boot, programming of eFUSEs and BBRAM.

Most Recent Threads

Before you post, please read our Community Forums Guidelines or to get started see our Community Forum Help.